Semiconductor apparatus and mode setting method for semiconductor apparatus

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-293626, filed Sep. 27, 2000, the entire contents of which are incorporated herein by reference. In a semiconductor apparatus, the first voltage detection circuit is configured to jud...

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Hauptverfasser: Miyakawa, Tadashi, Oowaki, Yukihito, Takashima, Daisaburo
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creator Miyakawa, Tadashi
Oowaki, Yukihito
Takashima, Daisaburo
description This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-293626, filed Sep. 27, 2000, the entire contents of which are incorporated herein by reference. In a semiconductor apparatus, the first voltage detection circuit is configured to judge whether a potential of the input signal is higher or lower than a first reference potential, and output a first level signal if the potential of the input signal is judged to be higher. The second voltage detection circuit is configured to judge whether the potential of the input signal is higher or lower than a second reference potential, and output a second level signal if the potential of the input signal is judged to be lower. The operation mode entry setting circuit is configured to judge plural times whether or not output signals from the first and second voltage detection circuits coincide with predetermined levels in synchronization with an input clock signal, and make an enter of an operation mode if all of the judged-results show that the output signals coincide with the predetermined levels.
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title Semiconductor apparatus and mode setting method for semiconductor apparatus
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