Flash memory device

1. Field of the Invention A flash memory device capable of compensating the decrease of a threshold voltage of an unselected cell due to the drain coupling caused by a drain voltage supplied to a bit line of a selected cell is disclosed. The flash memory device provides a ground voltage to a source line of the selected cell while supplying a preset voltage to a source line of the unselected cell. The flash memory device employs a decoding unit for supplying a program voltage to a word line selected from a cell array based on a global word line signal, a local word line signal and a predecoder signal. The decoding unit also provides a ground voltage to a source line corresponding to the selected word line in response to a sector program signal and an inverted sector program signal and inputs a preset voltage higher than the ground voltage to source lines of unselected cells.