Field-effect transistor

The present invention concerns field-effect transistors, respectively a junction field-effect transistor and a metal-oxide semiconductor field-effect transistor (MOSFET) with substantially vertical geometry, wherein the field-effect transistors comprise a planar substrate, of non-conductive material. The invention also concerns a method for fabrication of field-effect transistors of this kind with a substantially vertical geometry, wherein the transistor comprises a planar substrate of non-conducting material. A field-effect transistor is made with electrodes () and isolators () in vertically provided layers, such that at least the electrodes () and the isolators () form a step () oriented vertically relative to the first electrode () or the substrate (). Implemented as a junction field-effect transistor (JFET) or a metal-oxide semiconducting field-effect transistor (MOSFET) the electrodes () forming respectively the drain and source electrode of the field-effect transistor or vice versa and the electrode () the gate electrode of the field-effect transistor. Over the layers in the vertical step () an amorphous, polycrystalline or microcrystalline inorganic or organic semiconductor material is provided and forms the active semiconductor of the transistor contacting the gate electrode () directly or indirectly and forming a vertically oriented transistor channel () of the p or n type between the first () and the second () electrode. In a method for fabrication of a field effect transistor a vertical step () is formed by a means of a photolithographic process and a soluble amorphous active semiconductor material () is deposited over the first electrode () and the vertical step () such that a vertically oriented transistor channel between the drain and source electrode () is obtained. In a JFET the semiconductor material () contacts the gate electrode () directly. In a MOSFET a vertically oriented gate isolator () is provided between the gate electrode () and the semiconductor material ().