Method of manufacturing a structure for reducing leakage currents by providing isolation between adjacent regions of an integrated circuit
The invention relates generally to methods for providing isolation between adjacent regions of an integrated circuit and more particularly to methods of reducing current leakage from an active region to a field oxide region in a circuit, such as an image sensor circuit. A fabrication method for prov...
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creator | Kopley, Thomas Edward Vook, Dietrich W Dungan, Thomas |
description | The invention relates generally to methods for providing isolation between adjacent regions of an integrated circuit and more particularly to methods of reducing current leakage from an active region to a field oxide region in a circuit, such as an image sensor circuit.
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure. |
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A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.</description><language>eng</language><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6417074$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64016</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6417074$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kopley, Thomas Edward</creatorcontrib><creatorcontrib>Vook, Dietrich W</creatorcontrib><creatorcontrib>Dungan, Thomas</creatorcontrib><creatorcontrib>Agilent Technologies, Inc</creatorcontrib><title>Method of manufacturing a structure for reducing leakage currents by providing isolation between adjacent regions of an integrated circuit</title><description>The invention relates generally to methods for providing isolation between adjacent regions of an integrated circuit and more particularly to methods of reducing current leakage from an active region to a field oxide region in a circuit, such as an image sensor circuit.
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjUEKAjEMRWfjQtQ75ALCiIMeQBQ37txLpk1rdGyHNFW8gqe2BQ_g6pP_X_6fNp8T6TVaiA4eGLJDo1k4eEBIKrleBC4KCNlsajAQ3tETmCxCQRP0bxglPtnWlFMcUDkG6ElfRAHQ3tAUsDT44qc6hQE4KHlBJQuGxWTWeTNxOCRa_HTWwGF_3h2XOY2FK1OX8lCl3XSrbbvt1n8gX5UgTsU</recordid><startdate>20020709</startdate><enddate>20020709</enddate><creator>Kopley, Thomas Edward</creator><creator>Vook, Dietrich W</creator><creator>Dungan, Thomas</creator><scope>EFH</scope></search><sort><creationdate>20020709</creationdate><title>Method of manufacturing a structure for reducing leakage currents by providing isolation between adjacent regions of an integrated circuit</title><author>Kopley, Thomas Edward ; Vook, Dietrich W ; Dungan, Thomas</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_064170743</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Kopley, Thomas Edward</creatorcontrib><creatorcontrib>Vook, Dietrich W</creatorcontrib><creatorcontrib>Dungan, Thomas</creatorcontrib><creatorcontrib>Agilent Technologies, Inc</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kopley, Thomas Edward</au><au>Vook, Dietrich W</au><au>Dungan, Thomas</au><aucorp>Agilent Technologies, Inc</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of manufacturing a structure for reducing leakage currents by providing isolation between adjacent regions of an integrated circuit</title><date>2002-07-09</date><risdate>2002</risdate><abstract>The invention relates generally to methods for providing isolation between adjacent regions of an integrated circuit and more particularly to methods of reducing current leakage from an active region to a field oxide region in a circuit, such as an image sensor circuit.
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.</abstract><oa>free_for_read</oa></addata></record> |
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title | Method of manufacturing a structure for reducing leakage currents by providing isolation between adjacent regions of an integrated circuit |
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