Computerized method and apparatus for designing wire bond diagrams and locating bond pads for a semiconductor device

Computerized method and apparatus for designing wire bond diagrams and locating bond pads for a semiconductor device

The present invention relates to the field of computerized integrated circuit design, in particular a computerized method and apparatus for designing bond diagrams and locating bond pads for a semiconductor device. The present invention provides a bond tool utility software package which extracts bo...

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Hauptverfasser: Eka, Laiman, Martinez, III, Marcello R, Fong, Carl H
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creator Eka, Laiman
Martinez, III, Marcello R
Fong, Carl H
description The present invention relates to the field of computerized integrated circuit design, in particular a computerized method and apparatus for designing bond diagrams and locating bond pads for a semiconductor device. The present invention provides a bond tool utility software package which extracts bond pad location data from a semiconductor chip design stored in one of a number of known formats (e.g., Opus, GDSII, or the like) and extracts conductor location data from an AUTOCAD file of a chip frame design. The utility retrieves bonding connection data from a design ASCII file and generates a bonding diagram for the semiconductor assembly. The utility also contains a subroutine for applying bonding design criteria to the resultant bonding diagram to determine whether all bonds are within established guidelines. If an impermissible bond is formed, the user may be alerted that one or more bonding pads may have to be relocated. In one embodiment of the present invention, the bonding utility may interface with a semiconductor design circuit to generate a suggested fix to an impermissible bonding situation. One or more bonding pads may be moved in the semiconductor design to correct for potential bonding deficiencies.
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title Computerized method and apparatus for designing wire bond diagrams and locating bond pads for a semiconductor device
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