Circuit substrate and fabrication method thereof
A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding con...
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creator | Hung, Chih-Pin Ou, In-De Chen, Chia-Shang Lin, Kuang-Hua Chao, Shin-Hua |
description | A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate. |
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The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. 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In addition, this invention also provides a fabrication method of the circuit substrate.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EFI</sourceid><recordid>eNrjZDBwzixKLs0sUSguTSouKUosSVVIzEtRSEtMKspMTizJzM9TyE0tychPUSjJSC1KzU_jYWBNS8wpTuWF0twMmm6uIc4euqXFBUDdeSXF8YkFBTlQzcXxRgYGJgYGFgYGpkbGpKgFANL0MoQ</recordid><startdate>20040429</startdate><enddate>20040429</enddate><creator>Hung, Chih-Pin</creator><creator>Ou, In-De</creator><creator>Chen, Chia-Shang</creator><creator>Lin, Kuang-Hua</creator><creator>Chao, Shin-Hua</creator><scope>EFI</scope></search><sort><creationdate>20040429</creationdate><title>Circuit substrate and fabrication method thereof</title><author>Hung, Chih-Pin ; Ou, In-De ; Chen, Chia-Shang ; Lin, Kuang-Hua ; Chao, Shin-Hua</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_applications_200400800523</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Hung, Chih-Pin</creatorcontrib><creatorcontrib>Ou, In-De</creatorcontrib><creatorcontrib>Chen, Chia-Shang</creatorcontrib><creatorcontrib>Lin, Kuang-Hua</creatorcontrib><creatorcontrib>Chao, Shin-Hua</creatorcontrib><collection>USPTO Published Applications</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hung, Chih-Pin</au><au>Ou, In-De</au><au>Chen, Chia-Shang</au><au>Lin, Kuang-Hua</au><au>Chao, Shin-Hua</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Circuit substrate and fabrication method thereof</title><date>2004-04-29</date><risdate>2004</risdate><abstract>A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.</abstract><oa>free_for_read</oa></addata></record> |
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title | Circuit substrate and fabrication method thereof |
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