Fabrication method of semiconductor integrated circuit device

An average value of dimensions of resist patterns formed each time exposure processing is effected on semiconductor substrates of a predetermined number of lots, is compared with a target dimension. When a drift between each of the dimensions of the formed resist patterns and the target dimension is...

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Bibliographische Detailangaben

Hauptverfasser:	Tokorozuki, Kazuyuki, Yokouchi, Tetsuji, Miyamoto, Yoshiyuki, Yamamoto, Koji
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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