Apparatus and method for error detection on source-synchronous buses

One embodiment of the present invention provides a system for detecting errors on a source-synchronous bus. The source-synchronous bus includes a plurality of data lines and a clock line. A transmitting mechanism configured to transmit data on the source-synchronous bus is coupled to the source-sync...

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1. Verfasser: Nishtala, Satyanarayana
Format: Patent
Sprache:eng
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