Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value

Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value

A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out...

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creator Ku, Yong-Guen
description A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.
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The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EFI</sourceid><recordid>eNqVizsOwkAMBdNQIOAObimQAgEuwEccgD4yGy-stLEjrxOS25NIFLRUo6c3M8_6c1ByBjXVogOgc5QSOGFTiZEUvOg0O1IL_AQEU-Tkx6eWisBH6sMjDhB4ikUrZEfwDvYa3QrtJ3DSso3sMLa0zGYeY6LVl4tsfb3cT7dNmxo0YkslNk0MDi0Ip3KX57t8WxTH_aH4x_0A75lNkA</recordid><startdate>20020919</startdate><enddate>20020919</enddate><creator>Ku, Yong-Guen</creator><scope>EFI</scope></search><sort><creationdate>20020919</creationdate><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><author>Ku, Yong-Guen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_applications_200201336453</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Ku, Yong-Guen</creatorcontrib><collection>USPTO Published Applications</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ku, Yong-Guen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value</title><date>2002-09-19</date><risdate>2002</risdate><abstract>A DMA controller includes a burst/single mode control circuit for automatically converting a DMA transfer operation mode to a burst mode and/or a single mode regardless of a data transfer counter value, and for performing the DMA transfer operation. The burst/single mode control circuit carries out the burst mode DMA transfer operation without the need for a control operation of the CPU a number of times corresponding to a quotient which is the result that the data transfer counter value divided by the burst length, and carries out successively the single mode DMA transfer operation by the number of times corresponding to the remainder of the division.</abstract><oa>free_for_read</oa></addata></record>
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title Direct memory access controller for converting a transfer mode flexibly in accordance with a data transfer counter value
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