Parallel Execution of Parlog

This monograph concentrates on the implementation of concurrent logic programming languages on loosely-coupled parallel computer architectures. Two different abstract models are also considered: a graph reduction based model and a more imperative approach. The design of a specialized instruction set...

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description This monograph concentrates on the implementation of concurrent logic programming languages on loosely-coupled parallel computer architectures. Two different abstract models are also considered: a graph reduction based model and a more imperative approach. The design of a specialized instruction set is presented that is general enough to be used for the whole family of concurrent logic programming languages. In particular the language Parlog is concentrated upon because it is the most efficiently implementable of all the non-flat logic programming languages. Other issues arising from the implementation of a programming language are discussed, in particular the design of a load balancing scheme which deals with the large number of short-lived processes inherent in a correct language implementation. Detailed descriptions of all the data structures and synchronisation algorithms are also presented. Resource exhaustion is also discussed and handled within the implementations. Detailed performance results for both models of computation are given. From the material it should be possible for the reader to create an implementation.
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fullrecord <record><control><sourceid>springer</sourceid><recordid>TN_cdi_springer_books_10_1007_BFb0022706</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>32584</sourcerecordid><originalsourceid>FETCH-LOGICAL-a31775-231248f7ff5a2c14d252b911cdfff0a9f4dbe7761c039dee137acf2a133fa1323</originalsourceid><addsrcrecordid>eNptj81Lw0AQxdcvMNZePHvI0UvsfOxmmqOWVoWCHsRr2Gx2ajU0kqj45zdSwUvnMANv3nvwM-YC4RoBZHK7qACIBPIDc8bOghVwkB-aBHPEjNkWR7uHczwlOTYJMFBWiOVTM-77NxiGyTnCxFw--c43TWzS-U8MX5_rdpO2mg5q067OzYn6po_jvzsyL4v58-w-Wz7ePcxulplnFHEZMZKdqqg6TwFtTY6qAjHUqgq-UFtXUSTHAFzUMSKLD0oemXVYxCNztSvuP7r1ZhW7smrb975EKH-Zy3_mwTrZY_VdeF1_x72JLcCAUZo</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>book</recordtype></control><display><type>book</type><title>Parallel Execution of Parlog</title><source>Springer Books</source><creator>Cheese, Andrew</creator><creatorcontrib>Cheese, Andrew ; SpringerLink (Online service)</creatorcontrib><description>This monograph concentrates on the implementation of concurrent logic programming languages on loosely-coupled parallel computer architectures. Two different abstract models are also considered: a graph reduction based model and a more imperative approach. The design of a specialized instruction set is presented that is general enough to be used for the whole family of concurrent logic programming languages. In particular the language Parlog is concentrated upon because it is the most efficiently implementable of all the non-flat logic programming languages. Other issues arising from the implementation of a programming language are discussed, in particular the design of a load balancing scheme which deals with the large number of short-lived processes inherent in a correct language implementation. Detailed descriptions of all the data structures and synchronisation algorithms are also presented. Resource exhaustion is also discussed and handled within the implementations. Detailed performance results for both models of computation are given. From the material it should be possible for the reader to create an implementation.</description><identifier>ISSN: 0302-9743</identifier><identifier>ISBN: 3540553827</identifier><identifier>ISBN: 9783540553823</identifier><identifier>ISBN: 9783662181027</identifier><identifier>ISBN: 3662181029</identifier><identifier>EISSN: 1611-3349</identifier><identifier>EISBN: 3540470506</identifier><identifier>EISBN: 9783540470502</identifier><identifier>DOI: 10.1007/BFb0022706</identifier><language>eng</language><publisher>Berlin, Heidelberg: Springer Berlin Heidelberg</publisher><subject>Computation by Abstract Devices ; Computer network architectures ; Computer Science ; Computer System Implementation ; Programming Languages, Compilers, Interpreters ; Software Engineering</subject><creationdate>1992</creationdate><tpages>X, 190</tpages><format>X, 190</format><rights>Springer-Verlag Berlin Heidelberg 1992</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><relation>Lecture Notes in Computer Science</relation></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Uhttps://media.springernature.com/w306/springer-static/cover-hires/book/978-3-540-47050-2</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/BFb0022706$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/BFb0022706$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>306,776,780,782,27904,38234,41421,42490</link.rule.ids></links><search><creatorcontrib>Cheese, Andrew</creatorcontrib><creatorcontrib>SpringerLink (Online service)</creatorcontrib><title>Parallel Execution of Parlog</title><description>This monograph concentrates on the implementation of concurrent logic programming languages on loosely-coupled parallel computer architectures. Two different abstract models are also considered: a graph reduction based model and a more imperative approach. The design of a specialized instruction set is presented that is general enough to be used for the whole family of concurrent logic programming languages. In particular the language Parlog is concentrated upon because it is the most efficiently implementable of all the non-flat logic programming languages. Other issues arising from the implementation of a programming language are discussed, in particular the design of a load balancing scheme which deals with the large number of short-lived processes inherent in a correct language implementation. Detailed descriptions of all the data structures and synchronisation algorithms are also presented. Resource exhaustion is also discussed and handled within the implementations. Detailed performance results for both models of computation are given. From the material it should be possible for the reader to create an implementation.</description><subject>Computation by Abstract Devices</subject><subject>Computer network architectures</subject><subject>Computer Science</subject><subject>Computer System Implementation</subject><subject>Programming Languages, Compilers, Interpreters</subject><subject>Software Engineering</subject><issn>0302-9743</issn><issn>1611-3349</issn><isbn>3540553827</isbn><isbn>9783540553823</isbn><isbn>9783662181027</isbn><isbn>3662181029</isbn><isbn>3540470506</isbn><isbn>9783540470502</isbn><fulltext>true</fulltext><rsrctype>book</rsrctype><creationdate>1992</creationdate><recordtype>book</recordtype><sourceid/><recordid>eNptj81Lw0AQxdcvMNZePHvI0UvsfOxmmqOWVoWCHsRr2Gx2ajU0kqj45zdSwUvnMANv3nvwM-YC4RoBZHK7qACIBPIDc8bOghVwkB-aBHPEjNkWR7uHczwlOTYJMFBWiOVTM-77NxiGyTnCxFw--c43TWzS-U8MX5_rdpO2mg5q067OzYn6po_jvzsyL4v58-w-Wz7ePcxulplnFHEZMZKdqqg6TwFtTY6qAjHUqgq-UFtXUSTHAFzUMSKLD0oemXVYxCNztSvuP7r1ZhW7smrb975EKH-Zy3_mwTrZY_VdeF1_x72JLcCAUZo</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Cheese, Andrew</creator><general>Springer Berlin Heidelberg</general><scope/></search><sort><creationdate>1992</creationdate><title>Parallel Execution of Parlog</title><author>Cheese, Andrew</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a31775-231248f7ff5a2c14d252b911cdfff0a9f4dbe7761c039dee137acf2a133fa1323</frbrgroupid><rsrctype>books</rsrctype><prefilter>books</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Computation by Abstract Devices</topic><topic>Computer network architectures</topic><topic>Computer Science</topic><topic>Computer System Implementation</topic><topic>Programming Languages, Compilers, Interpreters</topic><topic>Software Engineering</topic><toplevel>online_resources</toplevel><creatorcontrib>Cheese, Andrew</creatorcontrib><creatorcontrib>SpringerLink (Online service)</creatorcontrib></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Cheese, Andrew</au><aucorp>SpringerLink (Online service)</aucorp><format>book</format><genre>book</genre><ristype>BOOK</ristype><btitle>Parallel Execution of Parlog</btitle><seriestitle>Lecture Notes in Computer Science</seriestitle><date>1992</date><risdate>1992</risdate><volume>586</volume><issn>0302-9743</issn><eissn>1611-3349</eissn><isbn>3540553827</isbn><isbn>9783540553823</isbn><isbn>9783662181027</isbn><isbn>3662181029</isbn><eisbn>3540470506</eisbn><eisbn>9783540470502</eisbn><abstract>This monograph concentrates on the implementation of concurrent logic programming languages on loosely-coupled parallel computer architectures. Two different abstract models are also considered: a graph reduction based model and a more imperative approach. The design of a specialized instruction set is presented that is general enough to be used for the whole family of concurrent logic programming languages. In particular the language Parlog is concentrated upon because it is the most efficiently implementable of all the non-flat logic programming languages. Other issues arising from the implementation of a programming language are discussed, in particular the design of a load balancing scheme which deals with the large number of short-lived processes inherent in a correct language implementation. Detailed descriptions of all the data structures and synchronisation algorithms are also presented. Resource exhaustion is also discussed and handled within the implementations. Detailed performance results for both models of computation are given. From the material it should be possible for the reader to create an implementation.</abstract><cop>Berlin, Heidelberg</cop><pub>Springer Berlin Heidelberg</pub><doi>10.1007/BFb0022706</doi><tpages>X, 190</tpages></addata></record>
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1611-3349
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subjects Computation by Abstract Devices
Computer network architectures
Computer Science
Computer System Implementation
Programming Languages, Compilers, Interpreters
Software Engineering
title Parallel Execution of Parlog
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-26T09%3A30%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-springer&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=book&rft.btitle=Parallel%20Execution%20of%20Parlog&rft.au=Cheese,%20Andrew&rft.aucorp=SpringerLink%20(Online%20service)&rft.date=1992&rft.volume=586&rft.issn=0302-9743&rft.eissn=1611-3349&rft.isbn=3540553827&rft.isbn_list=9783540553823&rft.isbn_list=9783662181027&rft.isbn_list=3662181029&rft_id=info:doi/10.1007/BFb0022706&rft_dat=%3Cspringer%3E32584%3C/springer%3E%3Curl%3E%3C/url%3E&rft.eisbn=3540470506&rft.eisbn_list=9783540470502&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true