Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation

A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dua...

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Veröffentlicht in:IEEE transactions on biomedical circuits and systems 2023-04, Vol.17 (2), p.1-14
Hauptverfasser: Hsieh, Chia-Chi, Wu, Yi-Hui, Ker, Ming-Dou
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Wu, Yi-Hui
Ker, Ming-Dou
description A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. Moreover, the proposed stimulator chip has been applied on both imitation measurement and in-vivo animal test successfully.
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All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. 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All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. 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All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. 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identifier ISSN: 1932-4545
ispartof IEEE transactions on biomedical circuits and systems, 2023-04, Vol.17 (2), p.1-14
issn 1932-4545
1940-9990
language eng
recordid cdi_pubmed_primary_37027548
source IEEE Electronic Library (IEL)
subjects Animals
biphasic stimulation
bipolar stimulator
charge balance
CMOS
Configuration management
current stimulation
Digital control
Electric potential
Electric Stimulation
Electrical stimuli
Electrodes
Electrodes, Implanted
Equipment Design
Generators
Impedance
in-vivo animal test
Low voltage
Modulation
monopolar stimulator
neuro-modulation
Neuromodulation
Phasor measurement units
Reproducibility of Results
Stimulation
Stimulators
Substrates
Transistors
Voltage
Voltage control
voltage stimulation
Waveforms
title Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation
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