Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation
A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dua...
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Veröffentlicht in: | IEEE transactions on biomedical circuits and systems 2023-04, Vol.17 (2), p.1-14 |
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description | A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. Moreover, the proposed stimulator chip has been applied on both imitation measurement and in-vivo animal test successfully. |
doi_str_mv | 10.1109/TBCAS.2023.3246164 |
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All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. Moreover, the proposed stimulator chip has been applied on both imitation measurement and in-vivo animal test successfully.</description><identifier>ISSN: 1932-4545</identifier><identifier>EISSN: 1940-9990</identifier><identifier>DOI: 10.1109/TBCAS.2023.3246164</identifier><identifier>PMID: 37027548</identifier><identifier>CODEN: ITBCCW</identifier><language>eng</language><publisher>United States: IEEE</publisher><subject>Animals ; biphasic stimulation ; bipolar stimulator ; charge balance ; CMOS ; Configuration management ; current stimulation ; Digital control ; Electric potential ; Electric Stimulation ; Electrical stimuli ; Electrodes ; Electrodes, Implanted ; Equipment Design ; Generators ; Impedance ; in-vivo animal test ; Low voltage ; Modulation ; monopolar stimulator ; neuro-modulation ; Neuromodulation ; Phasor measurement units ; Reproducibility of Results ; Stimulation ; Stimulators ; Substrates ; Transistors ; Voltage ; Voltage control ; voltage stimulation ; Waveforms</subject><ispartof>IEEE transactions on biomedical circuits and systems, 2023-04, Vol.17 (2), p.1-14</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c352t-aa762003f18fae28347e2012107fe3d0a274d94cc447bb196c314402566d0dde3</citedby><cites>FETCH-LOGICAL-c352t-aa762003f18fae28347e2012107fe3d0a274d94cc447bb196c314402566d0dde3</cites><orcidid>0000-0003-3622-181X ; 0000-0003-2655-6675</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10048509$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/10048509$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttps://www.ncbi.nlm.nih.gov/pubmed/37027548$$D View this record in MEDLINE/PubMed$$Hfree_for_read</backlink></links><search><creatorcontrib>Hsieh, Chia-Chi</creatorcontrib><creatorcontrib>Wu, Yi-Hui</creatorcontrib><creatorcontrib>Ker, Ming-Dou</creatorcontrib><title>Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation</title><title>IEEE transactions on biomedical circuits and systems</title><addtitle>TBCAS</addtitle><addtitle>IEEE Trans Biomed Circuits Syst</addtitle><description>A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. Moreover, the proposed stimulator chip has been applied on both imitation measurement and in-vivo animal test successfully.</description><subject>Animals</subject><subject>biphasic stimulation</subject><subject>bipolar stimulator</subject><subject>charge balance</subject><subject>CMOS</subject><subject>Configuration management</subject><subject>current stimulation</subject><subject>Digital control</subject><subject>Electric potential</subject><subject>Electric Stimulation</subject><subject>Electrical stimuli</subject><subject>Electrodes</subject><subject>Electrodes, Implanted</subject><subject>Equipment Design</subject><subject>Generators</subject><subject>Impedance</subject><subject>in-vivo animal test</subject><subject>Low voltage</subject><subject>Modulation</subject><subject>monopolar stimulator</subject><subject>neuro-modulation</subject><subject>Neuromodulation</subject><subject>Phasor measurement units</subject><subject>Reproducibility of Results</subject><subject>Stimulation</subject><subject>Stimulators</subject><subject>Substrates</subject><subject>Transistors</subject><subject>Voltage</subject><subject>Voltage control</subject><subject>voltage stimulation</subject><subject>Waveforms</subject><issn>1932-4545</issn><issn>1940-9990</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><sourceid>EIF</sourceid><recordid>eNpdkdFO2zAUhq1paDDGCyA0RdrNblKOj504voSwDaRCJ7Xs1nKTkyoojcFONPH2OGuHEDe2ZX__pyP_jJ1ymHEO-nx1WV4sZwgoZgJlznP5gR1xLSHVWsPH6SwwlZnMDtnnEB4Ashw1fmKHQgGqTBZHbH1Fod30iWuSq9F2aen6pt2M3g6t63dXt66mZDm027Gzg_NJ2ydz9zf947rBbigpbxfL5Ld3FYWQNPH9jkbvptTER8sXdtDYLtDJfj9m9z9_rMrrdL74dVNezNNKZDik1qocAUTDi8YSFkIqQuDIQTUkarCoZK1lVUmp1muu80pwKQGzPK-hrkkcs-8776N3TyOFwWzbUFHX2Z7cGAwqXahoK4qIfnuHPrjR93E6gwXnKi6YRwp3VOVdCJ4a8-jbrfXPhoOZGjD_GjBTA2bfQAx93avH9Zbq18j_L4_A2Q5oieiNEWSRgRYveYKIgw</recordid><startdate>20230401</startdate><enddate>20230401</enddate><creator>Hsieh, Chia-Chi</creator><creator>Wu, Yi-Hui</creator><creator>Ker, Ming-Dou</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>CGR</scope><scope>CUY</scope><scope>CVF</scope><scope>ECM</scope><scope>EIF</scope><scope>NPM</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7QO</scope><scope>7SP</scope><scope>7TB</scope><scope>8FD</scope><scope>FR3</scope><scope>L7M</scope><scope>P64</scope><scope>7X8</scope><orcidid>https://orcid.org/0000-0003-3622-181X</orcidid><orcidid>https://orcid.org/0000-0003-2655-6675</orcidid></search><sort><creationdate>20230401</creationdate><title>Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation</title><author>Hsieh, Chia-Chi ; Wu, Yi-Hui ; Ker, Ming-Dou</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c352t-aa762003f18fae28347e2012107fe3d0a274d94cc447bb196c314402566d0dde3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Animals</topic><topic>biphasic stimulation</topic><topic>bipolar stimulator</topic><topic>charge balance</topic><topic>CMOS</topic><topic>Configuration management</topic><topic>current stimulation</topic><topic>Digital control</topic><topic>Electric potential</topic><topic>Electric Stimulation</topic><topic>Electrical stimuli</topic><topic>Electrodes</topic><topic>Electrodes, Implanted</topic><topic>Equipment Design</topic><topic>Generators</topic><topic>Impedance</topic><topic>in-vivo animal test</topic><topic>Low voltage</topic><topic>Modulation</topic><topic>monopolar stimulator</topic><topic>neuro-modulation</topic><topic>Neuromodulation</topic><topic>Phasor measurement units</topic><topic>Reproducibility of Results</topic><topic>Stimulation</topic><topic>Stimulators</topic><topic>Substrates</topic><topic>Transistors</topic><topic>Voltage</topic><topic>Voltage control</topic><topic>voltage stimulation</topic><topic>Waveforms</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Hsieh, Chia-Chi</creatorcontrib><creatorcontrib>Wu, Yi-Hui</creatorcontrib><creatorcontrib>Ker, Ming-Dou</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Medline</collection><collection>MEDLINE</collection><collection>MEDLINE (Ovid)</collection><collection>MEDLINE</collection><collection>MEDLINE</collection><collection>PubMed</collection><collection>CrossRef</collection><collection>Biotechnology Research Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Technology Research Database</collection><collection>Engineering Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Biotechnology and BioEngineering Abstracts</collection><collection>MEDLINE - Academic</collection><jtitle>IEEE transactions on biomedical circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hsieh, Chia-Chi</au><au>Wu, Yi-Hui</au><au>Ker, Ming-Dou</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation</atitle><jtitle>IEEE transactions on biomedical circuits and systems</jtitle><stitle>TBCAS</stitle><addtitle>IEEE Trans Biomed Circuits Syst</addtitle><date>2023-04-01</date><risdate>2023</risdate><volume>17</volume><issue>2</issue><spage>1</spage><epage>14</epage><pages>1-14</pages><issn>1932-4545</issn><eissn>1940-9990</eissn><coden>ITBCCW</coden><abstract>A dual-configuration dual-mode stimulator for neuro-modulation is proposed and designed. All the electrical stimulation patterns that frequently used for neuro-modulation can be generated by the proposed stimulator chip. Dual-configuration represents the bipolar or monopolar structure, meanwhile dual-mode stands for the current or voltage output. No matter what stimulation circumstance is chosen, biphasic or monophasic waveforms can be fully supported by the proposed stimulator chip. The stimulator chip with 4 stimulation channels has been fabricated in 0.18-μm 1.8-V/3.3-V low-voltage CMOS process with common grounded p-type substrate, which is suitable for SoC integration. The design has conquered the overstress and reliability issues in the low-voltage transistors under the negative voltage power domain. Each channel in the stimulator chip only occupies the silicon area of 0.052 mm 2 , and the maximum output level of stimulus amplitude is up to ±3.6 mA and ±3.6 V. With the built-in discharge function, bio-safety concern of unbalanced charge in neuro-stimulation can be dealt with properly. Moreover, the proposed stimulator chip has been applied on both imitation measurement and in-vivo animal test successfully.</abstract><cop>United States</cop><pub>IEEE</pub><pmid>37027548</pmid><doi>10.1109/TBCAS.2023.3246164</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0003-3622-181X</orcidid><orcidid>https://orcid.org/0000-0003-2655-6675</orcidid></addata></record> |
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subjects | Animals biphasic stimulation bipolar stimulator charge balance CMOS Configuration management current stimulation Digital control Electric potential Electric Stimulation Electrical stimuli Electrodes Electrodes, Implanted Equipment Design Generators Impedance in-vivo animal test Low voltage Modulation monopolar stimulator neuro-modulation Neuromodulation Phasor measurement units Reproducibility of Results Stimulation Stimulators Substrates Transistors Voltage Voltage control voltage stimulation Waveforms |
title | Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation |
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