Uniformity optimization techniques for rapid thermal processing systems
This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices fr...
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| Veröffentlicht in: | IEEE transactions on semiconductor manufacturing 2001-08, Vol.14 (3), p.218-226 |
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| container_title | IEEE transactions on semiconductor manufacturing |
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| creator | Acharya, N. Kirtikar, V. Shooshtarian, S. Hong Doan Timans, P.J. Balakrishnan, K.S. Knutson, K.L. |
| description | This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices from the baseline system, while the second method involves customization of the baseline response surface for each system. The approaches use the response surfaces for iterative modification of zone powers to reduce the process nonuniformity on successively processed wafers. These methods are applied to the optimization of rapid thermal oxidation processes on several lamp-heated rapid thermal processing systems. Most of the uniformity improvement is obtained with the first two optimization runs; in some instances, the process is optimized to less than 1% 1-sigma nonuniformity with the use of just two wafers. Because the response surfaces from the baseline system can be reused for all similar systems, considerable savings in time and wafers are realized. |
| doi_str_mv | 10.1109/66.939818 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_914666159</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>939818</ieee_id><sourcerecordid>29397724</sourcerecordid><originalsourceid>FETCH-LOGICAL-c427t-dc11d77d1c55fe7ac2a8bf83a388cd1777be8fa8403ba179423bdb5eb99a305d3</originalsourceid><addsrcrecordid>eNqF0U1LAzEQBuAgCtbqwaunRUTxsDXZfB-laBUKXuw5ZLNZm7JfJttD_fVm2SLiwUIgh3lmGOYF4BLBGUJQPjA2k1gKJI7ABFEq0gwTegwmUEiSMgr5KTgLYQMhIkTyCVisGle2vnb9Lmm73tXuS_eubZLemnXjPrc2JLGeeN25IunX1te6SjrfGhuCaz6SsAu9rcM5OCl1FezF_p-C1fPT-_wlXb4tXuePy9SQjPdpYRAqOC-QobS0XJtMi7wUWGMhTIE457kVpRYE4lwjLkmG8yKnNpdSY0gLPAV349y4wrBcr2oXjK0q3dh2G5REhDGGqIzy9l-ZxTtxnpHDUJBM4PgOQjbsLQd4_Qdu2q1v4l2UlDimIOCA7kdkfBuCt6XqvKu13ykE1ZClYkyNWUZ7sx-og9FV6XVjXPjVIDMoeWRXI3PW2p_qfsY3OfWmIg</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>993650808</pqid></control><display><type>article</type><title>Uniformity optimization techniques for rapid thermal processing systems</title><source>IEEE Electronic Library (IEL)</source><creator>Acharya, N. ; Kirtikar, V. ; Shooshtarian, S. ; Hong Doan ; Timans, P.J. ; Balakrishnan, K.S. ; Knutson, K.L.</creator><creatorcontrib>Acharya, N. ; Kirtikar, V. ; Shooshtarian, S. ; Hong Doan ; Timans, P.J. ; Balakrishnan, K.S. ; Knutson, K.L.</creatorcontrib><description>This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices from the baseline system, while the second method involves customization of the baseline response surface for each system. The approaches use the response surfaces for iterative modification of zone powers to reduce the process nonuniformity on successively processed wafers. These methods are applied to the optimization of rapid thermal oxidation processes on several lamp-heated rapid thermal processing systems. Most of the uniformity improvement is obtained with the first two optimization runs; in some instances, the process is optimized to less than 1% 1-sigma nonuniformity with the use of just two wafers. Because the response surfaces from the baseline system can be reused for all similar systems, considerable savings in time and wafers are realized.</description><identifier>ISSN: 0894-6507</identifier><identifier>EISSN: 1558-2345</identifier><identifier>DOI: 10.1109/66.939818</identifier><identifier>CODEN: ITSMED</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Electronics ; Exact sciences and technology ; Finite element methods ; Gain ; Iterative methods ; Joining processes ; Lamps ; Mathematical analysis ; Methods ; Microelectronic fabrication (materials and surfaces technology) ; Monte Carlo methods ; Nonuniformity ; Optimization ; Optimization methods ; Optimization techniques ; Rapid thermal processing ; Response surface methodology ; Response surfaces ; Robustness ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Semiconductors ; Studies ; Temperature control ; Variability ; Wafers</subject><ispartof>IEEE transactions on semiconductor manufacturing, 2001-08, Vol.14 (3), p.218-226</ispartof><rights>2001 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2001</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c427t-dc11d77d1c55fe7ac2a8bf83a388cd1777be8fa8403ba179423bdb5eb99a305d3</citedby><cites>FETCH-LOGICAL-c427t-dc11d77d1c55fe7ac2a8bf83a388cd1777be8fa8403ba179423bdb5eb99a305d3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/939818$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,776,780,785,786,792,23909,23910,25118,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/939818$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=1092097$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Acharya, N.</creatorcontrib><creatorcontrib>Kirtikar, V.</creatorcontrib><creatorcontrib>Shooshtarian, S.</creatorcontrib><creatorcontrib>Hong Doan</creatorcontrib><creatorcontrib>Timans, P.J.</creatorcontrib><creatorcontrib>Balakrishnan, K.S.</creatorcontrib><creatorcontrib>Knutson, K.L.</creatorcontrib><title>Uniformity optimization techniques for rapid thermal processing systems</title><title>IEEE transactions on semiconductor manufacturing</title><addtitle>TSM</addtitle><description>This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices from the baseline system, while the second method involves customization of the baseline response surface for each system. The approaches use the response surfaces for iterative modification of zone powers to reduce the process nonuniformity on successively processed wafers. These methods are applied to the optimization of rapid thermal oxidation processes on several lamp-heated rapid thermal processing systems. Most of the uniformity improvement is obtained with the first two optimization runs; in some instances, the process is optimized to less than 1% 1-sigma nonuniformity with the use of just two wafers. Because the response surfaces from the baseline system can be reused for all similar systems, considerable savings in time and wafers are realized.</description><subject>Applied sciences</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Finite element methods</subject><subject>Gain</subject><subject>Iterative methods</subject><subject>Joining processes</subject><subject>Lamps</subject><subject>Mathematical analysis</subject><subject>Methods</subject><subject>Microelectronic fabrication (materials and surfaces technology)</subject><subject>Monte Carlo methods</subject><subject>Nonuniformity</subject><subject>Optimization</subject><subject>Optimization methods</subject><subject>Optimization techniques</subject><subject>Rapid thermal processing</subject><subject>Response surface methodology</subject><subject>Response surfaces</subject><subject>Robustness</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Semiconductors</subject><subject>Studies</subject><subject>Temperature control</subject><subject>Variability</subject><subject>Wafers</subject><issn>0894-6507</issn><issn>1558-2345</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2001</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqF0U1LAzEQBuAgCtbqwaunRUTxsDXZfB-laBUKXuw5ZLNZm7JfJttD_fVm2SLiwUIgh3lmGOYF4BLBGUJQPjA2k1gKJI7ABFEq0gwTegwmUEiSMgr5KTgLYQMhIkTyCVisGle2vnb9Lmm73tXuS_eubZLemnXjPrc2JLGeeN25IunX1te6SjrfGhuCaz6SsAu9rcM5OCl1FezF_p-C1fPT-_wlXb4tXuePy9SQjPdpYRAqOC-QobS0XJtMi7wUWGMhTIE457kVpRYE4lwjLkmG8yKnNpdSY0gLPAV349y4wrBcr2oXjK0q3dh2G5REhDGGqIzy9l-ZxTtxnpHDUJBM4PgOQjbsLQd4_Qdu2q1v4l2UlDimIOCA7kdkfBuCt6XqvKu13ykE1ZClYkyNWUZ7sx-og9FV6XVjXPjVIDMoeWRXI3PW2p_qfsY3OfWmIg</recordid><startdate>20010801</startdate><enddate>20010801</enddate><creator>Acharya, N.</creator><creator>Kirtikar, V.</creator><creator>Shooshtarian, S.</creator><creator>Hong Doan</creator><creator>Timans, P.J.</creator><creator>Balakrishnan, K.S.</creator><creator>Knutson, K.L.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope><scope>7TB</scope><scope>FR3</scope><scope>F28</scope></search><sort><creationdate>20010801</creationdate><title>Uniformity optimization techniques for rapid thermal processing systems</title><author>Acharya, N. ; Kirtikar, V. ; Shooshtarian, S. ; Hong Doan ; Timans, P.J. ; Balakrishnan, K.S. ; Knutson, K.L.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c427t-dc11d77d1c55fe7ac2a8bf83a388cd1777be8fa8403ba179423bdb5eb99a305d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Applied sciences</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Finite element methods</topic><topic>Gain</topic><topic>Iterative methods</topic><topic>Joining processes</topic><topic>Lamps</topic><topic>Mathematical analysis</topic><topic>Methods</topic><topic>Microelectronic fabrication (materials and surfaces technology)</topic><topic>Monte Carlo methods</topic><topic>Nonuniformity</topic><topic>Optimization</topic><topic>Optimization methods</topic><topic>Optimization techniques</topic><topic>Rapid thermal processing</topic><topic>Response surface methodology</topic><topic>Response surfaces</topic><topic>Robustness</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Semiconductors</topic><topic>Studies</topic><topic>Temperature control</topic><topic>Variability</topic><topic>Wafers</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Acharya, N.</creatorcontrib><creatorcontrib>Kirtikar, V.</creatorcontrib><creatorcontrib>Shooshtarian, S.</creatorcontrib><creatorcontrib>Hong Doan</creatorcontrib><creatorcontrib>Timans, P.J.</creatorcontrib><creatorcontrib>Balakrishnan, K.S.</creatorcontrib><creatorcontrib>Knutson, K.L.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Mechanical & Transportation Engineering Abstracts</collection><collection>Engineering Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><jtitle>IEEE transactions on semiconductor manufacturing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Acharya, N.</au><au>Kirtikar, V.</au><au>Shooshtarian, S.</au><au>Hong Doan</au><au>Timans, P.J.</au><au>Balakrishnan, K.S.</au><au>Knutson, K.L.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Uniformity optimization techniques for rapid thermal processing systems</atitle><jtitle>IEEE transactions on semiconductor manufacturing</jtitle><stitle>TSM</stitle><date>2001-08-01</date><risdate>2001</risdate><volume>14</volume><issue>3</issue><spage>218</spage><epage>226</epage><pages>218-226</pages><issn>0894-6507</issn><eissn>1558-2345</eissn><coden>ITSMED</coden><abstract>This paper presents two efficient robust methods for uniformity optimization of rapid thermal processes. Both of these methods involve the reuse of empirical response surfaces linking zone powers to measured process data created on a baseline system. The first method uses fossilized gain matrices from the baseline system, while the second method involves customization of the baseline response surface for each system. The approaches use the response surfaces for iterative modification of zone powers to reduce the process nonuniformity on successively processed wafers. These methods are applied to the optimization of rapid thermal oxidation processes on several lamp-heated rapid thermal processing systems. Most of the uniformity improvement is obtained with the first two optimization runs; in some instances, the process is optimized to less than 1% 1-sigma nonuniformity with the use of just two wafers. Because the response surfaces from the baseline system can be reused for all similar systems, considerable savings in time and wafers are realized.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/66.939818</doi><tpages>9</tpages></addata></record> |
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| subjects | Applied sciences Electronics Exact sciences and technology Finite element methods Gain Iterative methods Joining processes Lamps Mathematical analysis Methods Microelectronic fabrication (materials and surfaces technology) Monte Carlo methods Nonuniformity Optimization Optimization methods Optimization techniques Rapid thermal processing Response surface methodology Response surfaces Robustness Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductors Studies Temperature control Variability Wafers |
| title | Uniformity optimization techniques for rapid thermal processing systems |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-14T06%3A48%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Uniformity%20optimization%20techniques%20for%20rapid%20thermal%20processing%20systems&rft.jtitle=IEEE%20transactions%20on%20semiconductor%20manufacturing&rft.au=Acharya,%20N.&rft.date=2001-08-01&rft.volume=14&rft.issue=3&rft.spage=218&rft.epage=226&rft.pages=218-226&rft.issn=0894-6507&rft.eissn=1558-2345&rft.coden=ITSMED&rft_id=info:doi/10.1109/66.939818&rft_dat=%3Cproquest_RIE%3E29397724%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=993650808&rft_id=info:pmid/&rft_ieee_id=939818&rfr_iscdi=true |