A 1.8∼3.2-GHz fully differential GaAs MESFET PLL

A 1.8-3.2-GHz fully differential phase-locked loop (PLL) is realized for asynchronous transfer mode clock generation applications. The PLL includes a new differential voltage controlled oscillator with the wide tuning range of 1.74 [similar to] 3.40 GHz and a new differential charge pump with improv...

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Veröffentlicht in:IEEE journal of solid-state circuits 2001-04, Vol.36 (4), p.605-610
Hauptverfasser: Cheung, Tae-Sik, Lee, Bhum-Cheol, Choi, Eun-Chang, Choi, Woo-Young
Format: Artikel
Sprache:eng
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Zusammenfassung:A 1.8-3.2-GHz fully differential phase-locked loop (PLL) is realized for asynchronous transfer mode clock generation applications. The PLL includes a new differential voltage controlled oscillator with the wide tuning range of 1.74 [similar to] 3.40 GHz and a new differential charge pump with improved hold characteristics. The PLL is implemented with 0.5- mu m GaAs MESFET technology. The experimental results show that the proposed PLL has a lock range of 1.8 [similar to] 3.2 GHz and its output RMS jitter is at most 5.0 ps (0.015 UI) at 3.2 GHz.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.913738