TCAD-based demonstration of improved spacer select gate EEPROM cell architecture

An SSG EEPROM (Spacer Select Gate Electrically Erasable Programmable Read Only Memory) cell is proposed for improvement in program and erase operations and compared with a conventional one. Electrical characteristics of the conventional SSG EEPROM cell in program and erase operations are simulated, analyzed, using TCAD software tools, and verified against measurements. The improved SSG EEPROM cell reaches a target threshold voltage 3.9 V at 0.26 ms after the program operation starts, whereas the conventional cell at 1.7 ms. The Fowler–Nordheim tunneling current and floating gate charge of the improved EEPROM cell during the program operation are 5 times and 46% larger than those of the conventional cell, respectively. Scaling down the SSG EEPROM cells improves both the program and erase speeds. As the floating gate length of the conventional SSG EEPROM cell is reduced from 0.21 to 0.1 μm, the 0.1-μm EEPROM cell reaches the target program threshold voltage 25 times faster than the 0.21-μm cell.