Tightening the bounds on feasible preemptions
Data caches are an increasingly important architectural feature in most modern computer systems. They help bridge the gap between processor speeds and memory access times. One inherent difficulty of using data caches in a real-time system is the unpredictability of memory accesses, which makes it di...
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| Veröffentlicht in: | ACM transactions on embedded computing systems 2010-12, Vol.10 (2) |
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| container_title | ACM transactions on embedded computing systems |
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| creator | Ramaprasad, Harini Mueller, Frank |
| description | Data caches are an increasingly important architectural feature in most modern computer systems. They help bridge the gap between processor speeds and memory access times. One inherent difficulty of using data caches in a real-time system is the unpredictability of memory accesses, which makes it difficult to calculate worst-case execution times (WCETs) of real-time tasks. |
| doi_str_mv | 10.1145/378795.378859 |
| format | Article |
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| fulltext | fulltext |
| identifier | ISSN: 1539-9087 |
| ispartof | ACM transactions on embedded computing systems, 2010-12, Vol.10 (2) |
| issn | 1539-9087 |
| language | eng |
| recordid | cdi_proquest_miscellaneous_901651380 |
| source | ACM Digital Library Complete |
| subjects | Access time Embedded computer systems Mathematical analysis Microprocessors Real time Tasks Tightening |
| title | Tightening the bounds on feasible preemptions |
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