Fermi pinning-induced thermal instability of metal-gate work functions
The dependence of the metal-gate work function on the annealing temperature is experimentally studied. We observe increased Fermi-level pinning of the metal-gate work function with increased annealing temperature. This effect is more significant for SiO/sub 2/ than for HfO/sub 2/ gate dielectric. A...
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| Veröffentlicht in: | IEEE electron device letters 2004-05, Vol.25 (5), p.337-339 |
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| container_end_page | 339 |
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| container_issue | 5 |
| container_start_page | 337 |
| container_title | IEEE electron device letters |
| container_volume | 25 |
| creator | Yu, H.Y. Ren, C. Yee-Chia Yeo Kang, J.F. Wang, X.P. Ma, H.H.H. Ming-Fu Li Chan, D.S.H. Kwong, D.-L. |
| description | The dependence of the metal-gate work function on the annealing temperature is experimentally studied. We observe increased Fermi-level pinning of the metal-gate work function with increased annealing temperature. This effect is more significant for SiO/sub 2/ than for HfO/sub 2/ gate dielectric. A metal-dielectric interface model that takes the role of extrinsic states into account is proposed to explain the work function thermal instability. This letter provides new understanding on work function control for metal-gate transistors and on metal-dielectric interfaces. |
| doi_str_mv | 10.1109/LED.2004.827643 |
| format | Article |
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We observe increased Fermi-level pinning of the metal-gate work function with increased annealing temperature. This effect is more significant for SiO/sub 2/ than for HfO/sub 2/ gate dielectric. A metal-dielectric interface model that takes the role of extrinsic states into account is proposed to explain the work function thermal instability. This letter provides new understanding on work function control for metal-gate transistors and on metal-dielectric interfaces.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2004.827643</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Annealing ; Capacitors ; Devices ; Dielectric materials ; Dielectrics ; Electrodes ; Fabrication ; Gates ; Hafnium oxide ; Inorganic materials ; Laboratories ; Pinning ; Silicon ; Temperature dependence ; Thermal instability ; Work functions</subject><ispartof>IEEE electron device letters, 2004-05, Vol.25 (5), p.337-339</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2004</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c477t-73e97c8bdc0c920b89a4f5ef0efe86a360546c869e8d482b9cb4213bdba5eccb3</citedby><cites>FETCH-LOGICAL-c477t-73e97c8bdc0c920b89a4f5ef0efe86a360546c869e8d482b9cb4213bdba5eccb3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1295126$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1295126$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yu, H.Y.</creatorcontrib><creatorcontrib>Ren, C.</creatorcontrib><creatorcontrib>Yee-Chia Yeo</creatorcontrib><creatorcontrib>Kang, J.F.</creatorcontrib><creatorcontrib>Wang, X.P.</creatorcontrib><creatorcontrib>Ma, H.H.H.</creatorcontrib><creatorcontrib>Ming-Fu Li</creatorcontrib><creatorcontrib>Chan, D.S.H.</creatorcontrib><creatorcontrib>Kwong, D.-L.</creatorcontrib><title>Fermi pinning-induced thermal instability of metal-gate work functions</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>The dependence of the metal-gate work function on the annealing temperature is experimentally studied. We observe increased Fermi-level pinning of the metal-gate work function with increased annealing temperature. This effect is more significant for SiO/sub 2/ than for HfO/sub 2/ gate dielectric. A metal-dielectric interface model that takes the role of extrinsic states into account is proposed to explain the work function thermal instability. This letter provides new understanding on work function control for metal-gate transistors and on metal-dielectric interfaces.</description><subject>Annealing</subject><subject>Capacitors</subject><subject>Devices</subject><subject>Dielectric materials</subject><subject>Dielectrics</subject><subject>Electrodes</subject><subject>Fabrication</subject><subject>Gates</subject><subject>Hafnium oxide</subject><subject>Inorganic materials</subject><subject>Laboratories</subject><subject>Pinning</subject><subject>Silicon</subject><subject>Temperature dependence</subject><subject>Thermal instability</subject><subject>Work functions</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2004</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqNkUtLw0AURgdRsD7WLtwEF7pKO6_MYym1VaHgRtfDZHJTpyaTmkmQ_ntTIggu1NWFy_k-LvcgdEHwlBCsZ6vF3ZRizKeKSsHZAZqQLFMpzgQ7RBMsOUkZweIYncS4wZhwLvkELZfQ1j7Z-hB8WKc-FL2DIuleh7WtEh9iZ3Nf-W6XNGVSQ2erdG07SD6a9i0p--A634R4ho5KW0U4_5qn6GW5eJ4_pKun-8f57Sp1XMoulQy0dCovHHaa4lxpy8sMSgwlKGGZwBkXTgkNquCK5trlnBKWF7nNwLmcnaKbsXfbNu89xM7UPjqoKhug6aNRWlAqFJYDef0rSZWmXBL6D1AyIocr_gapzCjnA3j1A9w0fRuGvxg99HAh5f6-2Qi5tomxhdJsW1_bdmcINnuhZhBq9kLNKHRIXI4JDwDfNNUZoYJ9Ambum24</recordid><startdate>20040501</startdate><enddate>20040501</enddate><creator>Yu, H.Y.</creator><creator>Ren, C.</creator><creator>Yee-Chia Yeo</creator><creator>Kang, J.F.</creator><creator>Wang, X.P.</creator><creator>Ma, H.H.H.</creator><creator>Ming-Fu Li</creator><creator>Chan, D.S.H.</creator><creator>Kwong, D.-L.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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We observe increased Fermi-level pinning of the metal-gate work function with increased annealing temperature. This effect is more significant for SiO/sub 2/ than for HfO/sub 2/ gate dielectric. A metal-dielectric interface model that takes the role of extrinsic states into account is proposed to explain the work function thermal instability. This letter provides new understanding on work function control for metal-gate transistors and on metal-dielectric interfaces.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2004.827643</doi><tpages>3</tpages></addata></record> |
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| issn | 0741-3106 1558-0563 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Annealing Capacitors Devices Dielectric materials Dielectrics Electrodes Fabrication Gates Hafnium oxide Inorganic materials Laboratories Pinning Silicon Temperature dependence Thermal instability Work functions |
| title | Fermi pinning-induced thermal instability of metal-gate work functions |
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