Performance and reliability of poly-Si TFTs on FSG buffer layer

A novel and process-compatible scheme for fabricating poly-Si thin-film transistors (TFTs) on an FSG buffer layer was proposed and demonstrated. Experimental results reveal that remarkably improved device performance and uniformity can be achieved with appropriate fluorine concentration. The poly-Si...

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Veröffentlicht in:IEEE electron device letters 2005-07, Vol.26 (7), p.467-469
Hauptverfasser: Wang, Shen De, Chang, Tzu Yun, Chien, Chao Hsin, Lo, Wei Hsiang, Sang, Jen Yi, Lee, Jam Wen, Lei, Tan Fu
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container_end_page 469
container_issue 7
container_start_page 467
container_title IEEE electron device letters
container_volume 26
creator Wang, Shen De
Chang, Tzu Yun
Chien, Chao Hsin
Lo, Wei Hsiang
Sang, Jen Yi
Lee, Jam Wen
Lei, Tan Fu
description A novel and process-compatible scheme for fabricating poly-Si thin-film transistors (TFTs) on an FSG buffer layer was proposed and demonstrated. Experimental results reveal that remarkably improved device performance and uniformity can be achieved with appropriate fluorine concentration. The poly-Si TFTs fabricated on FSG layers have a higher on-current, a lower leakage current, and a higher field-effect mobility compared with the conventional poly-Si TFTs. Furthermore, the incorporation of fluorine also increased the reliability of poly-Si TFTs against hot carrier stressing, which is attributed to the formation of Si-F bonds.
doi_str_mv 10.1109/LED.2005.851242
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source IEEE Electronic Library (IEL)
subjects Applied sciences
Atomic layer deposition
Buffer layer
Buffer layers
Chaos
Chemical vapor deposition
Devices
Electronics
Exact sciences and technology
fluorinated silicate oxide (FSG)
Fluorine
Glass
Grain boundaries
Leakage current
polycrystalline silicon thin-film transistors (poly-Si TFTs)
reliability
Semiconductor devices
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
Stress concentration
Substrates
Thin film transistors
Transistors
Variability
title Performance and reliability of poly-Si TFTs on FSG buffer layer
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