Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations

Process variation is becoming a primal concern in timing closure of LSI (Large Scale Integrated Circuit) with the progress of process technology scaling. To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most effici...

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Veröffentlicht in:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Communications and Computer Sciences, 2009/04/01, Vol.E92.A(4), pp.990-997
Hauptverfasser: OKUMURA, Takaaki, KUROKAWA, Atsushi, MASUDA, Hiroo, KANAMOTO, Toshiki, HASHIMOTO, Masanori, TAKAFUJI, Hiroshi, NAKASHIMA, Hidenari, ONO, Nobuto, SAKATA, Tsuyoshi, SATO, Takashi
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container_title IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
container_volume E92.A
creator OKUMURA, Takaaki
KUROKAWA, Atsushi
MASUDA, Hiroo
KANAMOTO, Toshiki
HASHIMOTO, Masanori
TAKAFUJI, Hiroshi
NAKASHIMA, Hidenari
ONO, Nobuto
SAKATA, Tsuyoshi
SATO, Takashi
description Process variation is becoming a primal concern in timing closure of LSI (Large Scale Integrated Circuit) with the progress of process technology scaling. To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most efficient ways for performance estimation. In this paper, we study variation of output transition-time. We firstly clarify that the transition-time variation can not be expressed accurately by a conventional first-order sensitivity-based approach in the case that the input transition-time is slow and the output load is small. We secondly reveal quadratic dependence of the output transition-time to operating margin in voltage. We finally propose a procedure through which the estimation of output transition-time becomes continuously accurate in wide range of input transition-time and output load combinations.
doi_str_mv 10.1587/transfun.E92.A.990
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1745-1337
1745-1337
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source J-STAGE
subjects Computation
Electric potential
Electronics
gate delay model
Integrated circuits
output
process variation
SSTA
Static timing analysis
Threshold voltage
Time measurements
transition time
Voltage
title Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations
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