Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations
Process variation is becoming a primal concern in timing closure of LSI (Large Scale Integrated Circuit) with the progress of process technology scaling. To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most effici...
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Veröffentlicht in: | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Communications and Computer Sciences, 2009/04/01, Vol.E92.A(4), pp.990-997 |
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creator | OKUMURA, Takaaki KUROKAWA, Atsushi MASUDA, Hiroo KANAMOTO, Toshiki HASHIMOTO, Masanori TAKAFUJI, Hiroshi NAKASHIMA, Hidenari ONO, Nobuto SAKATA, Tsuyoshi SATO, Takashi |
description | Process variation is becoming a primal concern in timing closure of LSI (Large Scale Integrated Circuit) with the progress of process technology scaling. To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most efficient ways for performance estimation. In this paper, we study variation of output transition-time. We firstly clarify that the transition-time variation can not be expressed accurately by a conventional first-order sensitivity-based approach in the case that the input transition-time is slow and the output load is small. We secondly reveal quadratic dependence of the output transition-time to operating margin in voltage. We finally propose a procedure through which the estimation of output transition-time becomes continuously accurate in wide range of input transition-time and output load combinations. |
doi_str_mv | 10.1587/transfun.E92.A.990 |
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To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most efficient ways for performance estimation. In this paper, we study variation of output transition-time. We firstly clarify that the transition-time variation can not be expressed accurately by a conventional first-order sensitivity-based approach in the case that the input transition-time is slow and the output load is small. We secondly reveal quadratic dependence of the output transition-time to operating margin in voltage. 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Fundamentals</addtitle><description>Process variation is becoming a primal concern in timing closure of LSI (Large Scale Integrated Circuit) with the progress of process technology scaling. To overcome this problem, SSTA (Statistical Static Timing Analysis) has been intensively studied since it is expected to be one of the most efficient ways for performance estimation. In this paper, we study variation of output transition-time. We firstly clarify that the transition-time variation can not be expressed accurately by a conventional first-order sensitivity-based approach in the case that the input transition-time is slow and the output load is small. We secondly reveal quadratic dependence of the output transition-time to operating margin in voltage. We finally propose a procedure through which the estimation of output transition-time becomes continuously accurate in wide range of input transition-time and output load combinations.</description><subject>Computation</subject><subject>Electric potential</subject><subject>Electronics</subject><subject>gate delay model</subject><subject>Integrated circuits</subject><subject>output</subject><subject>process variation</subject><subject>SSTA</subject><subject>Static timing analysis</subject><subject>Threshold voltage</subject><subject>Time measurements</subject><subject>transition time</subject><subject>Voltage</subject><issn>0916-8508</issn><issn>1745-1337</issn><issn>1745-1337</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2009</creationdate><recordtype>article</recordtype><recordid>eNpdkMtOwzAQRS0EEuXxA6y8Y5ViJ3YSL6OqQFGlbkK3lutMWld5FNtB6t_jUKgQq1ncc2Y0F6EHSqaU59mTt6pz9dBN5yKeFlMhyAWa0IzxiCZJdokmRNA0yjnJr9GNc3tCaB5TNkF20R5s_wktdB6bDs_69jB45U3fqQYXWg9W6SPua7wafEhwOV4yY45L0wJeK2u-8aCGoAJrui0udxbcrm8qvO4br7Z_OHeHrmrVOLj_mbfo_Xlezl6j5eplMSuWkWYp8xEHEkOVkDzLSVqrtOYaEs7EJqY8S2mltaprnvCUxjGwjQC6yTLINCeJSLmoklv0eNobHvwYwHnZGqehaVQH_eBkngtGBOMskPGJ1LZ3zkItD9a0yh4lJXLsV_72K0O_spCh3yC9naS9Gx88K8p6oxv4r7DzDPIZ0jtlJXTJFyaVjss</recordid><startdate>2009</startdate><enddate>2009</enddate><creator>OKUMURA, Takaaki</creator><creator>KUROKAWA, Atsushi</creator><creator>MASUDA, Hiroo</creator><creator>KANAMOTO, Toshiki</creator><creator>HASHIMOTO, Masanori</creator><creator>TAKAFUJI, Hiroshi</creator><creator>NAKASHIMA, Hidenari</creator><creator>ONO, Nobuto</creator><creator>SAKATA, Tsuyoshi</creator><creator>SATO, Takashi</creator><general>The Institute of Electronics, Information and Communication Engineers</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>2009</creationdate><title>Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations</title><author>OKUMURA, Takaaki ; KUROKAWA, Atsushi ; MASUDA, Hiroo ; KANAMOTO, Toshiki ; HASHIMOTO, Masanori ; TAKAFUJI, Hiroshi ; NAKASHIMA, Hidenari ; ONO, Nobuto ; SAKATA, Tsuyoshi ; SATO, Takashi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c464t-5e02ed3087806fa6f5ce3549b215761dccaff5356122e4b9e1b77e7c5039659d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2009</creationdate><topic>Computation</topic><topic>Electric potential</topic><topic>Electronics</topic><topic>gate delay model</topic><topic>Integrated circuits</topic><topic>output</topic><topic>process variation</topic><topic>SSTA</topic><topic>Static timing analysis</topic><topic>Threshold voltage</topic><topic>Time measurements</topic><topic>transition time</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>OKUMURA, Takaaki</creatorcontrib><creatorcontrib>KUROKAWA, Atsushi</creatorcontrib><creatorcontrib>MASUDA, Hiroo</creatorcontrib><creatorcontrib>KANAMOTO, Toshiki</creatorcontrib><creatorcontrib>HASHIMOTO, Masanori</creatorcontrib><creatorcontrib>TAKAFUJI, Hiroshi</creatorcontrib><creatorcontrib>NAKASHIMA, Hidenari</creatorcontrib><creatorcontrib>ONO, Nobuto</creatorcontrib><creatorcontrib>SAKATA, Tsuyoshi</creatorcontrib><creatorcontrib>SATO, Takashi</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>OKUMURA, Takaaki</au><au>KUROKAWA, Atsushi</au><au>MASUDA, Hiroo</au><au>KANAMOTO, Toshiki</au><au>HASHIMOTO, Masanori</au><au>TAKAFUJI, Hiroshi</au><au>NAKASHIMA, Hidenari</au><au>ONO, Nobuto</au><au>SAKATA, Tsuyoshi</au><au>SATO, Takashi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations</atitle><jtitle>IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences</jtitle><addtitle>IEICE Trans. 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subjects | Computation Electric potential Electronics gate delay model Integrated circuits output process variation SSTA Static timing analysis Threshold voltage Time measurements transition time Voltage |
title | Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations |
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