Optimizing Sequential Cycles Through Shannon Decomposition and Retiming

Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pipelines, but it is stymied by tight sequential cycles. Designers usually attack such cycles by manually combining Shannon de...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2007-03, Vol.26 (3), p.456-467
Hauptverfasser:	Soviani, C., Tardieu, O., Edwards, S.A.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Benchmarks Circuit optimization Circuit synthesis Circuits Clocks Computer aided design Decomposition Delay Design engineering Digital circuits encoding Feedback loop Logic circuits Multiplexing Optimization Pipelines Registers Sequential circuits sequential logic circuits
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