Optimizing Sequential Cycles Through Shannon Decomposition and Retiming
Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pipelines, but it is stymied by tight sequential cycles. Designers usually attack such cycles by manually combining Shannon de...
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| Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2007-03, Vol.26 (3), p.456-467 |
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| container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
| container_volume | 26 |
| creator | Soviani, C. Tardieu, O. Edwards, S.A. |
| description | Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pipelines, but it is stymied by tight sequential cycles. Designers usually attack such cycles by manually combining Shannon decomposition with retiming-effectively a form of speculation-but such manual decomposition is error prone. We propose an efficient algorithm that simultaneously applies Shannon decomposition and retiming to optimize circuits with tight sequential cycles. While the algorithm is only able to improve certain circuits (roughly half of the benchmarks we tried), the performance increase can be dramatic (7%-61%) with only a modest increase in area (1%-12%). The algorithm is also fast, making it a practical addition to a synthesis flow |
| doi_str_mv | 10.1109/TCAD.2006.890583 |
| format | Article |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Algorithms Benchmarks Circuit optimization Circuit synthesis Circuits Clocks Computer aided design Decomposition Delay Design engineering Digital circuits encoding Feedback loop Logic circuits Multiplexing Optimization Pipelines Registers Sequential circuits sequential logic circuits |
| title | Optimizing Sequential Cycles Through Shannon Decomposition and Retiming |
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