Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing
Several approaches to design a linear attenuator have been analyzed in terms of the transistor impedance variation, linearity, frequency responses, and circuit complexity. This paper proposes a novel method of using an adaptive bootstrapped body biasing. The method allows the attenuator to have maxi...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2011-05, Vol.46 (5), p.1023-1033 |
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creator | HUANG, Yan-Yu WOO, Wangmyong YOON, Youngchang LEE, Chang-Ho |
description | Several approaches to design a linear attenuator have been analyzed in terms of the transistor impedance variation, linearity, frequency responses, and circuit complexity. This paper proposes a novel method of using an adaptive bootstrapped body biasing. The method allows the attenuator to have maximum power handling capability and bandwidth without adding complexity to the circuit. A π-type variable attenuator for WCDMA transmitters has been designed and fabricated using IBM 0.18-μ m triple-well CMOS technology. The attenuator has a linear-in-dB controllability from 400 MHz to 3.7 GHz with an attenuation range of 33 dB. Its insertion loss is 0.9-2.9 dB and worst-case return loss is better than -9 dB within this frequency band. The minimum input 1-dB compression point (IP 1dB ) is above 7.5 dBm, and the minimum IIP 3 is greater than 17 dBm at 1.95 GHz. To our knowledge, this design achieves the best linearity performance and frequency responses, and has the smallest area among similar CMOS works. |
doi_str_mv | 10.1109/JSSC.2011.2117530 |
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This paper proposes a novel method of using an adaptive bootstrapped body biasing. The method allows the attenuator to have maximum power handling capability and bandwidth without adding complexity to the circuit. A π-type variable attenuator for WCDMA transmitters has been designed and fabricated using IBM 0.18-μ m triple-well CMOS technology. The attenuator has a linear-in-dB controllability from 400 MHz to 3.7 GHz with an attenuation range of 33 dB. Its insertion loss is 0.9-2.9 dB and worst-case return loss is better than -9 dB within this frequency band. The minimum input 1-dB compression point (IP 1dB ) is above 7.5 dBm, and the minimum IIP 3 is greater than 17 dBm at 1.95 GHz. To our knowledge, this design achieves the best linearity performance and frequency responses, and has the smallest area among similar CMOS works.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2011.2117530</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Attenuation ; Attenuators ; body effect ; bootstrapped body bias ; Circuit properties ; Circuits ; CMOS ; CMOS attenuators ; CMOS integrated circuits ; Complexity ; Design. Technologies. Operation analysis. Testing ; Electric, optical and optoelectronic circuits ; Electronics ; Exact sciences and technology ; highly linear attenuators ; Immune system ; Impedance ; Integrated circuits ; Linearity ; Materials handling ; Maximum power ; Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits ; Noise levels ; parasitic effects ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Transistors ; variable attenuators</subject><ispartof>IEEE journal of solid-state circuits, 2011-05, Vol.46 (5), p.1023-1033</ispartof><rights>2015 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) May 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c354t-1e6ec8e566f272052a46db762cddc39a344e2e803b58f0c5e48494ec37ee144d3</citedby><cites>FETCH-LOGICAL-c354t-1e6ec8e566f272052a46db762cddc39a344e2e803b58f0c5e48494ec37ee144d3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5738357$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,314,780,784,789,790,796,23930,23931,25140,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5738357$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=24190240$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>HUANG, Yan-Yu</creatorcontrib><creatorcontrib>WOO, Wangmyong</creatorcontrib><creatorcontrib>YOON, Youngchang</creatorcontrib><creatorcontrib>LEE, Chang-Ho</creatorcontrib><title>Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>Several approaches to design a linear attenuator have been analyzed in terms of the transistor impedance variation, linearity, frequency responses, and circuit complexity. This paper proposes a novel method of using an adaptive bootstrapped body biasing. The method allows the attenuator to have maximum power handling capability and bandwidth without adding complexity to the circuit. A π-type variable attenuator for WCDMA transmitters has been designed and fabricated using IBM 0.18-μ m triple-well CMOS technology. The attenuator has a linear-in-dB controllability from 400 MHz to 3.7 GHz with an attenuation range of 33 dB. Its insertion loss is 0.9-2.9 dB and worst-case return loss is better than -9 dB within this frequency band. The minimum input 1-dB compression point (IP 1dB ) is above 7.5 dBm, and the minimum IIP 3 is greater than 17 dBm at 1.95 GHz. To our knowledge, this design achieves the best linearity performance and frequency responses, and has the smallest area among similar CMOS works.</description><subject>Applied sciences</subject><subject>Attenuation</subject><subject>Attenuators</subject><subject>body effect</subject><subject>bootstrapped body bias</subject><subject>Circuit properties</subject><subject>Circuits</subject><subject>CMOS</subject><subject>CMOS attenuators</subject><subject>CMOS integrated circuits</subject><subject>Complexity</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>highly linear attenuators</subject><subject>Immune system</subject><subject>Impedance</subject><subject>Integrated circuits</subject><subject>Linearity</subject><subject>Materials handling</subject><subject>Maximum power</subject><subject>Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits</subject><subject>Noise levels</subject><subject>parasitic effects</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Transistors</subject><subject>variable attenuators</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkEtLw0AUhQdRsD5-gLgZBHGVOs9ksqzBJxXB-toN08lNOxKTOpMI_fdOaHHh5l4u9zuHw0HohJIxpSS_fJjNijEjlI4ZpZnkZAeNqJQqoRn_2EUjQqhKckbIPjoI4TOeQig6Qtd3brGs13jqGjAeP9_g4vFpht-Md2ZeA550HTS96Vof8LvrlnhSmlXnfgBfteUaXzkTXLM4QnuVqQMcb_cher25finukunT7X0xmSaWS9ElFFKwCmSaVixjRDIj0nKepcyWpeW54UIAA0X4XKqKWAlCiVyA5RlAzFvyQ3Sx8V359ruH0OkvFyzUtWmg7YNWmSTRJFWRPPtHfra9b2I4nUeryDEZIbqBrG9D8FDplXdfxq81JXqoVQ-16qFWva01as63xiZYU1feNNaFPyETNCdMDNzphnMA8PeWGVc8jl8BgX4W</recordid><startdate>20110501</startdate><enddate>20110501</enddate><creator>HUANG, Yan-Yu</creator><creator>WOO, Wangmyong</creator><creator>YOON, Youngchang</creator><creator>LEE, Chang-Ho</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20110501</creationdate><title>Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing</title><author>HUANG, Yan-Yu ; WOO, Wangmyong ; YOON, Youngchang ; LEE, Chang-Ho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c354t-1e6ec8e566f272052a46db762cddc39a344e2e803b58f0c5e48494ec37ee144d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Applied sciences</topic><topic>Attenuation</topic><topic>Attenuators</topic><topic>body effect</topic><topic>bootstrapped body bias</topic><topic>Circuit properties</topic><topic>Circuits</topic><topic>CMOS</topic><topic>CMOS attenuators</topic><topic>CMOS integrated circuits</topic><topic>Complexity</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>highly linear attenuators</topic><topic>Immune system</topic><topic>Impedance</topic><topic>Integrated circuits</topic><topic>Linearity</topic><topic>Materials handling</topic><topic>Maximum power</topic><topic>Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits</topic><topic>Noise levels</topic><topic>parasitic effects</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Transistors</topic><topic>variable attenuators</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>HUANG, Yan-Yu</creatorcontrib><creatorcontrib>WOO, Wangmyong</creatorcontrib><creatorcontrib>YOON, Youngchang</creatorcontrib><creatorcontrib>LEE, Chang-Ho</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HUANG, Yan-Yu</au><au>WOO, Wangmyong</au><au>YOON, Youngchang</au><au>LEE, Chang-Ho</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2011-05-01</date><risdate>2011</risdate><volume>46</volume><issue>5</issue><spage>1023</spage><epage>1033</epage><pages>1023-1033</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>Several approaches to design a linear attenuator have been analyzed in terms of the transistor impedance variation, linearity, frequency responses, and circuit complexity. This paper proposes a novel method of using an adaptive bootstrapped body biasing. The method allows the attenuator to have maximum power handling capability and bandwidth without adding complexity to the circuit. A π-type variable attenuator for WCDMA transmitters has been designed and fabricated using IBM 0.18-μ m triple-well CMOS technology. The attenuator has a linear-in-dB controllability from 400 MHz to 3.7 GHz with an attenuation range of 33 dB. Its insertion loss is 0.9-2.9 dB and worst-case return loss is better than -9 dB within this frequency band. The minimum input 1-dB compression point (IP 1dB ) is above 7.5 dBm, and the minimum IIP 3 is greater than 17 dBm at 1.95 GHz. To our knowledge, this design achieves the best linearity performance and frequency responses, and has the smallest area among similar CMOS works.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/JSSC.2011.2117530</doi><tpages>11</tpages></addata></record> |
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subjects | Applied sciences Attenuation Attenuators body effect bootstrapped body bias Circuit properties Circuits CMOS CMOS attenuators CMOS integrated circuits Complexity Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronics Exact sciences and technology highly linear attenuators Immune system Impedance Integrated circuits Linearity Materials handling Maximum power Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits Noise levels parasitic effects Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors variable attenuators |
title | Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing |
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