A Fully Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G WiMax Applications
In recent years, there has been tremendous interest in trying to implement the power amplifier in CMOS, due to its cost and integration benefits. Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2009-12, Vol.44 (12), p.3393-3402 |
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creator | Chowdhury, D. Hull, C.D. Degani, O.B. Wang, Y. Niknejad, A.M. |
description | In recent years, there has been tremendous interest in trying to implement the power amplifier in CMOS, due to its cost and integration benefits. Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In this paper, we report a single-chip linear CMOS PA with sufficient power and linearity for emerging OFDM-based 4G WiMAX applications. This 90 nm 2.4 GHz CMOS linear power amplifier uses a two-stage transformer-based power combiner and produces a saturated output power of 30.1 dBm with 33% PAE and 28 dB small-signal gain. A novel bypass network is introduced to ensure stability without sacrificing gain. The choice of optimal biasing and capacitive compensation produces very flat AM-AM and AM-PM response up to high power. The PA has been tested with OFDM modulated signal and produces EVM better than -25 dB at 22.7 dBm average power. Graceful power back-off is demonstrated through turning off one of the stages, allowing low-power operation with enhanced efficiency. |
doi_str_mv | 10.1109/JSSC.2009.2032277 |
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Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In this paper, we report a single-chip linear CMOS PA with sufficient power and linearity for emerging OFDM-based 4G WiMAX applications. This 90 nm 2.4 GHz CMOS linear power amplifier uses a two-stage transformer-based power combiner and produces a saturated output power of 30.1 dBm with 33% PAE and 28 dB small-signal gain. A novel bypass network is introduced to ensure stability without sacrificing gain. The choice of optimal biasing and capacitive compensation produces very flat AM-AM and AM-PM response up to high power. The PA has been tested with OFDM modulated signal and produces EVM better than -25 dB at 22.7 dBm average power. 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(IEEE) 2009</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c421t-d837d38cabfca7285d5bfecca1658da716982ecc303fba6ed479f5fef5629603</citedby><cites>FETCH-LOGICAL-c421t-d837d38cabfca7285d5bfecca1658da716982ecc303fba6ed479f5fef5629603</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5342364$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27915,27916,54749</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5342364$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chowdhury, D.</creatorcontrib><creatorcontrib>Hull, C.D.</creatorcontrib><creatorcontrib>Degani, O.B.</creatorcontrib><creatorcontrib>Wang, Y.</creatorcontrib><creatorcontrib>Niknejad, A.M.</creatorcontrib><title>A Fully Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G WiMax Applications</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>In recent years, there has been tremendous interest in trying to implement the power amplifier in CMOS, due to its cost and integration benefits. Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In this paper, we report a single-chip linear CMOS PA with sufficient power and linearity for emerging OFDM-based 4G WiMAX applications. This 90 nm 2.4 GHz CMOS linear power amplifier uses a two-stage transformer-based power combiner and produces a saturated output power of 30.1 dBm with 33% PAE and 28 dB small-signal gain. A novel bypass network is introduced to ensure stability without sacrificing gain. The choice of optimal biasing and capacitive compensation produces very flat AM-AM and AM-PM response up to high power. The PA has been tested with OFDM modulated signal and produces EVM better than -25 dB at 22.7 dBm average power. Graceful power back-off is demonstrated through turning off one of the stages, allowing low-power operation with enhanced efficiency.</description><subject>Amplification</subject><subject>Circuit faults</subject><subject>CMOS</subject><subject>CMOS power amplifier</subject><subject>Gain</subject><subject>High power amplifiers</subject><subject>Linearity</subject><subject>Noise levels</subject><subject>Optimization</subject><subject>Power amplifiers</subject><subject>power back-off</subject><subject>Power combiners</subject><subject>Power generation</subject><subject>Stability</subject><subject>Testing</subject><subject>transformer</subject><subject>transformer power combiner</subject><subject>WiMAX</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2009</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kctKI0EUhgtxYGJmHmBwU7hwVh3rflmGqImS4EACuisq3VWxpNMdq7oZ9emtEHHhws25fv-Bww_AH4xGGCN9cbtcTkYEIZ0DJUTKIzDAnKsCS_pwDAYIYVXoDPwEJyk95ZYxhQfAjuF1X9ev8Kbp3CbazlXwsrd1sWgrB2dh85h389A4GyEZMTidvcHJ4m4J_7X_XYTj7a4OPuTKtxGyKbwPC_sCx7s8Lm0X2ib9Aj-8rZP7_ZGHYHV9tZrMivnd9GYynhclI7grKkVlRVVp1760kihe8bV3ZWmx4KqyEgutSO4pon5thauY1J5757kgWiA6BH8PZ3exfe5d6sw2pNLVtW1c2yejJEdEYLUnz78lqaCMCSUzePYFfGr72OQnjMaSEKE1zhA-QGVsU4rOm10MWxtfDUZmb43ZW2P21pgPa7Lm9KAJzrlPnlNGqGD0HTwFiD4</recordid><startdate>20091201</startdate><enddate>20091201</enddate><creator>Chowdhury, D.</creator><creator>Hull, C.D.</creator><creator>Degani, O.B.</creator><creator>Wang, Y.</creator><creator>Niknejad, A.M.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In this paper, we report a single-chip linear CMOS PA with sufficient power and linearity for emerging OFDM-based 4G WiMAX applications. This 90 nm 2.4 GHz CMOS linear power amplifier uses a two-stage transformer-based power combiner and produces a saturated output power of 30.1 dBm with 33% PAE and 28 dB small-signal gain. A novel bypass network is introduced to ensure stability without sacrificing gain. The choice of optimal biasing and capacitive compensation produces very flat AM-AM and AM-PM response up to high power. The PA has been tested with OFDM modulated signal and produces EVM better than -25 dB at 22.7 dBm average power. Graceful power back-off is demonstrated through turning off one of the stages, allowing low-power operation with enhanced efficiency.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JSSC.2009.2032277</doi><tpages>10</tpages></addata></record> |
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subjects | Amplification Circuit faults CMOS CMOS power amplifier Gain High power amplifiers Linearity Noise levels Optimization Power amplifiers power back-off Power combiners Power generation Stability Testing transformer transformer power combiner WiMAX |
title | A Fully Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G WiMax Applications |
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