Embedded Vision Modules for Tracking and Counting People

This paper shows the algorithm implementation for a field-programmable gate array (FPGA)-based design for people counting using a low-level head-detection method. The hardware (HW) implementation on an FPGA allows the capture and online processing in real time on the same chip. Different annular pat...

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Veröffentlicht in:	IEEE transactions on instrumentation and measurement 2009-09, Vol.58 (9), p.3004-3011
Hauptverfasser:	Vicente, A.G., Munoz, I.B., Molina, P.J., Galilea, J.L.L.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithm design and analysis Algorithms Cameras Circuits Costs Counting Counting circuit Extraction Face detection Field programmable gate arrays field-programmable gate arrays (FPGAs) filtering Fires Hardware hardware (HW) design languages Head Hough transforms Image edge detection image processing Instrumentation pipeline processing Preprocessing Real time video camera Vision
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