High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree
In this brief, by operating the shifting and addition in parallel, an error-compensated adder-tree (ECAT) is proposed to deal with the truncation errors and to achieve low-error and high-throughput discrete cosine transform (DCT) design. Instead of the 12 bits used in previous works, 9-bit distribut...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2011-04, Vol.19 (4), p.709-714 |
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| container_title | IEEE transactions on very large scale integration (VLSI) systems |
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| creator | CHEN, Yuan-Ho CHANG, Tsin-Yuan LI, Chung-Yi |
| description | In this brief, by operating the shifting and addition in parallel, an error-compensated adder-tree (ECAT) is proposed to deal with the truncation errors and to achieve low-error and high-throughput discrete cosine transform (DCT) design. Instead of the 12 bits used in previous works, 9-bit distributed arithmetic-precision is chosen for this work so as to meet peak-signal-to-noise-ratio (PSNR) requirements. Thus, an area-efficient DCT core is implemented to achieve 1 Gpels/s throughput rate with gate counts of 22.2 K for the PSNR requirements outlined in the previous works. |
| doi_str_mv | 10.1109/TVLSI.2009.2037968 |
| format | Article |
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Testing</subject><subject>Digital circuits</subject><subject>Discrete cosine transform</subject><subject>Discrete cosine transforms</subject><subject>Distributed arithmetic (DA)-based</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>error-compensated adder-tree (ECAT)</subject><subject>Exact sciences and technology</subject><subject>Finite wordlength effects</subject><subject>Gates</subject><subject>Integrated circuits</subject><subject>PSNR</subject><subject>Read only memory</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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| ispartof | IEEE transactions on very large scale integration (VLSI) systems, 2011-04, Vol.19 (4), p.709-714 |
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| source | IEEE Electronic Library (IEL) |
| subjects | 2-D discrete cosine transform (DCT) Applied sciences Arithmetic Circuit properties Computer architecture Concurrent computing Costs Counting Design engineering Design. Technologies. Operation analysis. Testing Digital circuits Discrete cosine transform Discrete cosine transforms Distributed arithmetic (DA)-based Electric, optical and optoelectronic circuits Electronic circuits Electronics error-compensated adder-tree (ECAT) Exact sciences and technology Finite wordlength effects Gates Integrated circuits PSNR Read only memory Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Throughput Trees Truncation errors Very large scale integration Video compression |
| title | High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree |
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