Modeling software requirement with timing diagram and Simulink Stateflow
A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model. This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently b...
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Veröffentlicht in: | Information and software technology 2011-05, Vol.53 (5), p.484-493 |
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creator | Lee, Hongsuk Chung, Kihyun Park, Hyunsang Choi, Kyunghee |
description | A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model.
This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently behaving SL/SF model.
We add a few extra features to those of the typical timing diagrams. The extra features were chosen by the field engineers’ requests and the survey of many different commercial models. This paper proposes the formal method to describe the timing diagram. Based on the formal description, the converting algorithm translates a timing diagram into the SL/SF model.
By providing a path from timing diagram to SL/SF, system specifications can be described with both SL/SF and timing diagram. This paper addresses the details of outcomes that the proposed method was successfully applied to modeling “Theft watch system” and “Automotive power window controller. The proposed method has been successfully applied to other commercial systems, and to the models provided by Mathworks.
This paper proposed a methodology to describe system specification with both timing diagram and SL/SF. The strategy might help designers more efficiently describe specifications. In addition, the mixed specification can be simulated in SL/SF, and the specification can utilize other third party SL/SF tools such as test case generation or model check utilities. |
doi_str_mv | 10.1016/j.infsof.2010.11.012 |
format | Article |
fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_869806866</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0950584910002132</els_id><sourcerecordid>869806866</sourcerecordid><originalsourceid>FETCH-LOGICAL-c314t-39afbbbd8bafb4ca75e9214c543ea593c61e87e0d66c87fa86dcb7eb419624963</originalsourceid><addsrcrecordid>eNp9kE1LxDAQhoMouH78Aw_Fi6fWpE3T5CLIoq6w4mH1HNJ0uqb2YzdJXfz3ptSTB08Dw_O-zDwIXRGcEEzYbZOYvnZDnaR4WpEEk_QILQgvspjhND9GCyxyHOecilN05lyDMSlwhhdo9TJU0Jp-G4W8PygLkYX9aCx00PvoYPxH5E03AZVRW6u6SPVVtDHdGFKf0cYrD3U7HC7QSa1aB5e_8xy9Pz68LVfx-vXpeXm_jnVGqI8zoeqyLCtehkm1KnIQKaE6pxmoXGSaEeAF4IoxzYtacVbpsoCSEsFSKlh2jm7m3p0d9iM4LzvjNLSt6mEYneRMcMw4m8jrP2QzjLYPx0meC4IFFiJAdIa0HZyzUMudNZ2y35JgOcmVjZzlykmuJEQGuSF2N8cgvPplwEqnDfQaqmBOe1kN5v-CH6MChW4</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>859109099</pqid></control><display><type>article</type><title>Modeling software requirement with timing diagram and Simulink Stateflow</title><source>Access via ScienceDirect (Elsevier)</source><creator>Lee, Hongsuk ; Chung, Kihyun ; Park, Hyunsang ; Choi, Kyunghee</creator><creatorcontrib>Lee, Hongsuk ; Chung, Kihyun ; Park, Hyunsang ; Choi, Kyunghee</creatorcontrib><description>A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model.
This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently behaving SL/SF model.
We add a few extra features to those of the typical timing diagrams. The extra features were chosen by the field engineers’ requests and the survey of many different commercial models. This paper proposes the formal method to describe the timing diagram. Based on the formal description, the converting algorithm translates a timing diagram into the SL/SF model.
By providing a path from timing diagram to SL/SF, system specifications can be described with both SL/SF and timing diagram. This paper addresses the details of outcomes that the proposed method was successfully applied to modeling “Theft watch system” and “Automotive power window controller. The proposed method has been successfully applied to other commercial systems, and to the models provided by Mathworks.
This paper proposed a methodology to describe system specification with both timing diagram and SL/SF. The strategy might help designers more efficiently describe specifications. In addition, the mixed specification can be simulated in SL/SF, and the specification can utilize other third party SL/SF tools such as test case generation or model check utilities.</description><identifier>ISSN: 0950-5849</identifier><identifier>EISSN: 1873-6025</identifier><identifier>DOI: 10.1016/j.infsof.2010.11.012</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Algorithms ; Computer programs ; Finite-state machine ; Formal method ; Mathematical models ; Methodology ; Modeling software ; Simulink/Stateflow ; Software ; Software engineering ; Specifications ; Statechart ; Studies ; Systems development ; Time measurements ; Timing diagram</subject><ispartof>Information and software technology, 2011-05, Vol.53 (5), p.484-493</ispartof><rights>2010 Elsevier B.V.</rights><rights>Copyright Elsevier Science Ltd. May 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c314t-39afbbbd8bafb4ca75e9214c543ea593c61e87e0d66c87fa86dcb7eb419624963</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/j.infsof.2010.11.012$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>314,780,784,3550,27924,27925,45995</link.rule.ids></links><search><creatorcontrib>Lee, Hongsuk</creatorcontrib><creatorcontrib>Chung, Kihyun</creatorcontrib><creatorcontrib>Park, Hyunsang</creatorcontrib><creatorcontrib>Choi, Kyunghee</creatorcontrib><title>Modeling software requirement with timing diagram and Simulink Stateflow</title><title>Information and software technology</title><description>A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model.
This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently behaving SL/SF model.
We add a few extra features to those of the typical timing diagrams. The extra features were chosen by the field engineers’ requests and the survey of many different commercial models. This paper proposes the formal method to describe the timing diagram. Based on the formal description, the converting algorithm translates a timing diagram into the SL/SF model.
By providing a path from timing diagram to SL/SF, system specifications can be described with both SL/SF and timing diagram. This paper addresses the details of outcomes that the proposed method was successfully applied to modeling “Theft watch system” and “Automotive power window controller. The proposed method has been successfully applied to other commercial systems, and to the models provided by Mathworks.
This paper proposed a methodology to describe system specification with both timing diagram and SL/SF. The strategy might help designers more efficiently describe specifications. In addition, the mixed specification can be simulated in SL/SF, and the specification can utilize other third party SL/SF tools such as test case generation or model check utilities.</description><subject>Algorithms</subject><subject>Computer programs</subject><subject>Finite-state machine</subject><subject>Formal method</subject><subject>Mathematical models</subject><subject>Methodology</subject><subject>Modeling software</subject><subject>Simulink/Stateflow</subject><subject>Software</subject><subject>Software engineering</subject><subject>Specifications</subject><subject>Statechart</subject><subject>Studies</subject><subject>Systems development</subject><subject>Time measurements</subject><subject>Timing diagram</subject><issn>0950-5849</issn><issn>1873-6025</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><recordid>eNp9kE1LxDAQhoMouH78Aw_Fi6fWpE3T5CLIoq6w4mH1HNJ0uqb2YzdJXfz3ptSTB08Dw_O-zDwIXRGcEEzYbZOYvnZDnaR4WpEEk_QILQgvspjhND9GCyxyHOecilN05lyDMSlwhhdo9TJU0Jp-G4W8PygLkYX9aCx00PvoYPxH5E03AZVRW6u6SPVVtDHdGFKf0cYrD3U7HC7QSa1aB5e_8xy9Pz68LVfx-vXpeXm_jnVGqI8zoeqyLCtehkm1KnIQKaE6pxmoXGSaEeAF4IoxzYtacVbpsoCSEsFSKlh2jm7m3p0d9iM4LzvjNLSt6mEYneRMcMw4m8jrP2QzjLYPx0meC4IFFiJAdIa0HZyzUMudNZ2y35JgOcmVjZzlykmuJEQGuSF2N8cgvPplwEqnDfQaqmBOe1kN5v-CH6MChW4</recordid><startdate>201105</startdate><enddate>201105</enddate><creator>Lee, Hongsuk</creator><creator>Chung, Kihyun</creator><creator>Park, Hyunsang</creator><creator>Choi, Kyunghee</creator><general>Elsevier B.V</general><general>Elsevier Science Ltd</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>201105</creationdate><title>Modeling software requirement with timing diagram and Simulink Stateflow</title><author>Lee, Hongsuk ; Chung, Kihyun ; Park, Hyunsang ; Choi, Kyunghee</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c314t-39afbbbd8bafb4ca75e9214c543ea593c61e87e0d66c87fa86dcb7eb419624963</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Algorithms</topic><topic>Computer programs</topic><topic>Finite-state machine</topic><topic>Formal method</topic><topic>Mathematical models</topic><topic>Methodology</topic><topic>Modeling software</topic><topic>Simulink/Stateflow</topic><topic>Software</topic><topic>Software engineering</topic><topic>Specifications</topic><topic>Statechart</topic><topic>Studies</topic><topic>Systems development</topic><topic>Time measurements</topic><topic>Timing diagram</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lee, Hongsuk</creatorcontrib><creatorcontrib>Chung, Kihyun</creatorcontrib><creatorcontrib>Park, Hyunsang</creatorcontrib><creatorcontrib>Choi, Kyunghee</creatorcontrib><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>Information and software technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Lee, Hongsuk</au><au>Chung, Kihyun</au><au>Park, Hyunsang</au><au>Choi, Kyunghee</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Modeling software requirement with timing diagram and Simulink Stateflow</atitle><jtitle>Information and software technology</jtitle><date>2011-05</date><risdate>2011</risdate><volume>53</volume><issue>5</issue><spage>484</spage><epage>493</epage><pages>484-493</pages><issn>0950-5849</issn><eissn>1873-6025</eissn><abstract>A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model.
This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently behaving SL/SF model.
We add a few extra features to those of the typical timing diagrams. The extra features were chosen by the field engineers’ requests and the survey of many different commercial models. This paper proposes the formal method to describe the timing diagram. Based on the formal description, the converting algorithm translates a timing diagram into the SL/SF model.
By providing a path from timing diagram to SL/SF, system specifications can be described with both SL/SF and timing diagram. This paper addresses the details of outcomes that the proposed method was successfully applied to modeling “Theft watch system” and “Automotive power window controller. The proposed method has been successfully applied to other commercial systems, and to the models provided by Mathworks.
This paper proposed a methodology to describe system specification with both timing diagram and SL/SF. The strategy might help designers more efficiently describe specifications. In addition, the mixed specification can be simulated in SL/SF, and the specification can utilize other third party SL/SF tools such as test case generation or model check utilities.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/j.infsof.2010.11.012</doi><tpages>10</tpages></addata></record> |
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subjects | Algorithms Computer programs Finite-state machine Formal method Mathematical models Methodology Modeling software Simulink/Stateflow Software Software engineering Specifications Statechart Studies Systems development Time measurements Timing diagram |
title | Modeling software requirement with timing diagram and Simulink Stateflow |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-20T21%3A22%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Modeling%20software%20requirement%20with%20timing%20diagram%20and%20Simulink%20Stateflow&rft.jtitle=Information%20and%20software%20technology&rft.au=Lee,%20Hongsuk&rft.date=2011-05&rft.volume=53&rft.issue=5&rft.spage=484&rft.epage=493&rft.pages=484-493&rft.issn=0950-5849&rft.eissn=1873-6025&rft_id=info:doi/10.1016/j.infsof.2010.11.012&rft_dat=%3Cproquest_cross%3E869806866%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=859109099&rft_id=info:pmid/&rft_els_id=S0950584910002132&rfr_iscdi=true |