Reliability evaluation of logic circuits using probabilistic gate models

Logic circuits built using nanoscale technologies have significant reliability limitations due to fundamental physical and manufacturing constraints of their constituent devices. This paper presents a probabilistic gate model (PGM), which relates the output probability to the error and input probabi...

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Veröffentlicht in:	Microelectronics and reliability 2011-02, Vol.51 (2), p.468-476
Hauptverfasser:	Han, Jie, Chen, Hao, Boykin, Erin, Fortes, José
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Applied sciences Circuit properties Circuits Complexity Digital circuits Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Gates (circuits) Logic Mathematical models Modules Nanostructure
Online-Zugang:	Volltext
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