A new low-power high-speed prescaler in GNSS receivers

A new prescaler based on new Source Coupled Logic(SCL) latch is proposed in this paper, supplying Local Oscillator (LO) for receivers. Compared to traditional static SCL latch, a clock-controlling transistor is added to reduce the time constant at sensing time, and as a result, the maximum operating...

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Veröffentlicht in:Dian zi yu xin xi xue bao = Journal of electronics & information technology 2010-07, Vol.32 (7), p.1752-1755
Hauptverfasser: Yu, Yun-Feng, Ma, Cheng-Yan, Ye, Tian-Chun
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container_title Dian zi yu xin xi xue bao = Journal of electronics & information technology
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creator Yu, Yun-Feng
Ma, Cheng-Yan
Ye, Tian-Chun
description A new prescaler based on new Source Coupled Logic(SCL) latch is proposed in this paper, supplying Local Oscillator (LO) for receivers. Compared to traditional static SCL latch, a clock-controlling transistor is added to reduce the time constant at sensing time, and as a result, the maximum operating frequency increases and the operating range is enlarged. A simple but to some extent accurate small signal model for this new architecture is developed, and the advantages of new design are described in detail. This prescaler's maximum operating frequency can reach to 6.9 GHz when its current is only 1.2 mA. The prescaler is manufactured in 0.18 mu m CMOS process, and it has been successfully applied to GPS receivers.
doi_str_mv 10.3724/SP.J.1146.2009.00842
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source Alma/SFX Local Collection
subjects Electronics
Geographic information systems
Global Positioning System
Latches
Mathematical models
Oscillators
Prescalers
Receivers
Satellite navigation systems
title A new low-power high-speed prescaler in GNSS receivers
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