Cache Optimization for H.264/AVC Motion Compensation
In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizont...
Gespeichert in:
| Veröffentlicht in: | IEICE Transactions on Information and Systems 2008/12/01, Vol.E91.D(12), pp.2902-2905 |
|---|---|
| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 2905 |
|---|---|
| container_issue | 12 |
| container_start_page | 2902 |
| container_title | IEICE Transactions on Information and Systems |
| container_volume | E91.D |
| creator | YOON, Sangyong CHAE, Soo-Ik |
| description | In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizontal and vertical address bits of the frame buffer and each line stores an 8 × 2 pixel data in the reference frames. Moreover, we alleviate the data fragmentation problem by selecting its line size that equals the minimum access size of the DDR SDRAM. The bandwidth of the optimized cache averaged over five QCIF IBBP image sequences requires only 129% of the essential bandwidth of an H.264/AVC MC. |
| doi_str_mv | 10.1093/ietisy/e91-d.12.2902 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_855701126</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>855701126</sourcerecordid><originalsourceid>FETCH-LOGICAL-c596t-ed77c455488d3e0f5c611cfe9167358ff8ce8ac5297522a06e335c17c8e41023</originalsourceid><addsrcrecordid>eNo9kEtvwjAQhK2qlUpp_0EPuVQ9Bbx2nDhHlD6oBOKCerUsZ12M8qB2ONBf3wRQTrtafTOzGkKegc6A5nzusHPhNMcc4nIGbMZyym7IBLJExMBTuCUTmkMaS8HZPXkIYU8pSAZiQpJCmx1Gm0PnavenO9c2kW19tJyxNJkvvoto3Z6PRVsfsAln4pHcWV0FfLrOKdl-vG-LZbzafH4Vi1VsRJ52MZZZZhIhEilLjtQKkwIY27-ZZlxIa6VBqY1geSYY0zRFzoWBzEhMgDI-Ja8X24Nvf48YOlW7YLCqdIPtMSgpREYBWNqTyYU0vg3Bo1UH72rtTwqoGipSl4pUn61KBUwNFfWyl2uADkZX1uvGuDBqGc2FAJr13PrC7UOnf3AEtO-cqVB1vTC4xqr33v5tsB-XIWfkzE57hQ3_B26Dgqw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>855701126</pqid></control><display><type>article</type><title>Cache Optimization for H.264/AVC Motion Compensation</title><source>J-STAGE (Japan Science & Technology Information Aggregator, Electronic) Freely Available Titles - Japanese</source><source>Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals</source><creator>YOON, Sangyong ; CHAE, Soo-Ik</creator><creatorcontrib>YOON, Sangyong ; CHAE, Soo-Ik</creatorcontrib><description>In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizontal and vertical address bits of the frame buffer and each line stores an 8 × 2 pixel data in the reference frames. Moreover, we alleviate the data fragmentation problem by selecting its line size that equals the minimum access size of the DDR SDRAM. The bandwidth of the optimized cache averaged over five QCIF IBBP image sequences requires only 129% of the essential bandwidth of an H.264/AVC MC.</description><identifier>ISSN: 0916-8532</identifier><identifier>ISSN: 1745-1361</identifier><identifier>EISSN: 1745-1361</identifier><identifier>DOI: 10.1093/ietisy/e91-d.12.2902</identifier><language>eng</language><publisher>Oxford: The Institute of Electronics, Information and Communication Engineers</publisher><subject>Applied sciences ; Bandwidth ; Buffers ; cache ; Coding, codes ; Computer science; control theory; systems ; DDR SDRAM ; Decoders ; Electronics ; Exact sciences and technology ; H.264 ; Image processing ; Information, signal and communications theory ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Memory and file management (including protection and security) ; memory bandwidth ; Memory organisation. Data processing ; Motion compensation ; Optimization ; Pixels ; Reproduction ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Signal and communications theory ; Signal processing ; Software ; Stores ; Telecommunications and information theory</subject><ispartof>IEICE Transactions on Information and Systems, 2008/12/01, Vol.E91.D(12), pp.2902-2905</ispartof><rights>2008 The Institute of Electronics, Information and Communication Engineers</rights><rights>2009 INIST-CNRS</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c596t-ed77c455488d3e0f5c611cfe9167358ff8ce8ac5297522a06e335c17c8e41023</citedby></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,1877,4010,27900,27901,27902</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=20955107$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>YOON, Sangyong</creatorcontrib><creatorcontrib>CHAE, Soo-Ik</creatorcontrib><title>Cache Optimization for H.264/AVC Motion Compensation</title><title>IEICE Transactions on Information and Systems</title><addtitle>IEICE Trans. Inf. & Syst.</addtitle><description>In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizontal and vertical address bits of the frame buffer and each line stores an 8 × 2 pixel data in the reference frames. Moreover, we alleviate the data fragmentation problem by selecting its line size that equals the minimum access size of the DDR SDRAM. The bandwidth of the optimized cache averaged over five QCIF IBBP image sequences requires only 129% of the essential bandwidth of an H.264/AVC MC.</description><subject>Applied sciences</subject><subject>Bandwidth</subject><subject>Buffers</subject><subject>cache</subject><subject>Coding, codes</subject><subject>Computer science; control theory; systems</subject><subject>DDR SDRAM</subject><subject>Decoders</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>H.264</subject><subject>Image processing</subject><subject>Information, signal and communications theory</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Memory and file management (including protection and security)</subject><subject>memory bandwidth</subject><subject>Memory organisation. Data processing</subject><subject>Motion compensation</subject><subject>Optimization</subject><subject>Pixels</subject><subject>Reproduction</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Signal and communications theory</subject><subject>Signal processing</subject><subject>Software</subject><subject>Stores</subject><subject>Telecommunications and information theory</subject><issn>0916-8532</issn><issn>1745-1361</issn><issn>1745-1361</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><recordid>eNo9kEtvwjAQhK2qlUpp_0EPuVQ9Bbx2nDhHlD6oBOKCerUsZ12M8qB2ONBf3wRQTrtafTOzGkKegc6A5nzusHPhNMcc4nIGbMZyym7IBLJExMBTuCUTmkMaS8HZPXkIYU8pSAZiQpJCmx1Gm0PnavenO9c2kW19tJyxNJkvvoto3Z6PRVsfsAln4pHcWV0FfLrOKdl-vG-LZbzafH4Vi1VsRJ52MZZZZhIhEilLjtQKkwIY27-ZZlxIa6VBqY1geSYY0zRFzoWBzEhMgDI-Ja8X24Nvf48YOlW7YLCqdIPtMSgpREYBWNqTyYU0vg3Bo1UH72rtTwqoGipSl4pUn61KBUwNFfWyl2uADkZX1uvGuDBqGc2FAJr13PrC7UOnf3AEtO-cqVB1vTC4xqr33v5tsB-XIWfkzE57hQ3_B26Dgqw</recordid><startdate>2008</startdate><enddate>2008</enddate><creator>YOON, Sangyong</creator><creator>CHAE, Soo-Ik</creator><general>The Institute of Electronics, Information and Communication Engineers</general><general>Oxford University Press</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>2008</creationdate><title>Cache Optimization for H.264/AVC Motion Compensation</title><author>YOON, Sangyong ; CHAE, Soo-Ik</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c596t-ed77c455488d3e0f5c611cfe9167358ff8ce8ac5297522a06e335c17c8e41023</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Applied sciences</topic><topic>Bandwidth</topic><topic>Buffers</topic><topic>cache</topic><topic>Coding, codes</topic><topic>Computer science; control theory; systems</topic><topic>DDR SDRAM</topic><topic>Decoders</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>H.264</topic><topic>Image processing</topic><topic>Information, signal and communications theory</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Memory and file management (including protection and security)</topic><topic>memory bandwidth</topic><topic>Memory organisation. Data processing</topic><topic>Motion compensation</topic><topic>Optimization</topic><topic>Pixels</topic><topic>Reproduction</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Signal and communications theory</topic><topic>Signal processing</topic><topic>Software</topic><topic>Stores</topic><topic>Telecommunications and information theory</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>YOON, Sangyong</creatorcontrib><creatorcontrib>CHAE, Soo-Ik</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>IEICE Transactions on Information and Systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>YOON, Sangyong</au><au>CHAE, Soo-Ik</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Cache Optimization for H.264/AVC Motion Compensation</atitle><jtitle>IEICE Transactions on Information and Systems</jtitle><addtitle>IEICE Trans. Inf. & Syst.</addtitle><date>2008</date><risdate>2008</risdate><volume>E91.D</volume><issue>12</issue><spage>2902</spage><epage>2905</epage><pages>2902-2905</pages><issn>0916-8532</issn><issn>1745-1361</issn><eissn>1745-1361</eissn><abstract>In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizontal and vertical address bits of the frame buffer and each line stores an 8 × 2 pixel data in the reference frames. Moreover, we alleviate the data fragmentation problem by selecting its line size that equals the minimum access size of the DDR SDRAM. The bandwidth of the optimized cache averaged over five QCIF IBBP image sequences requires only 129% of the essential bandwidth of an H.264/AVC MC.</abstract><cop>Oxford</cop><pub>The Institute of Electronics, Information and Communication Engineers</pub><doi>10.1093/ietisy/e91-d.12.2902</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0916-8532 |
| ispartof | IEICE Transactions on Information and Systems, 2008/12/01, Vol.E91.D(12), pp.2902-2905 |
| issn | 0916-8532 1745-1361 1745-1361 |
| language | eng |
| recordid | cdi_proquest_miscellaneous_855701126 |
| source | J-STAGE (Japan Science & Technology Information Aggregator, Electronic) Freely Available Titles - Japanese; Elektronische Zeitschriftenbibliothek - Frei zugängliche E-Journals |
| subjects | Applied sciences Bandwidth Buffers cache Coding, codes Computer science control theory systems DDR SDRAM Decoders Electronics Exact sciences and technology H.264 Image processing Information, signal and communications theory Integrated circuits Integrated circuits by function (including memories and processors) Memory and file management (including protection and security) memory bandwidth Memory organisation. Data processing Motion compensation Optimization Pixels Reproduction Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal and communications theory Signal processing Software Stores Telecommunications and information theory |
| title | Cache Optimization for H.264/AVC Motion Compensation |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T23%3A45%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Cache%20Optimization%20for%20H.264/AVC%20Motion%20Compensation&rft.jtitle=IEICE%20Transactions%20on%20Information%20and%20Systems&rft.au=YOON,%20Sangyong&rft.date=2008&rft.volume=E91.D&rft.issue=12&rft.spage=2902&rft.epage=2905&rft.pages=2902-2905&rft.issn=0916-8532&rft.eissn=1745-1361&rft_id=info:doi/10.1093/ietisy/e91-d.12.2902&rft_dat=%3Cproquest_cross%3E855701126%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=855701126&rft_id=info:pmid/&rfr_iscdi=true |