Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impe...
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| Veröffentlicht in: | IEICE Transactions on Electronics 2008/06/01, Vol.E91.C(6), pp.936-944 |
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| container_end_page | 944 |
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| container_issue | 6 |
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| container_title | IEICE Transactions on Electronics |
| container_volume | E91.C |
| creator | ICHIKAWA, Kouji TAKAHASHI, Yuki SAKURAI, Yukihiko TSUDA, Takahiro IWASE, Isao NAGATA, Makoto |
| description | Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications. |
| doi_str_mv | 10.1093/ietele/e91-c.6.936 |
| format | Article |
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EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. 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Electron.</addtitle><date>2008</date><risdate>2008</risdate><volume>E91.C</volume><issue>6</issue><spage>936</spage><epage>944</epage><pages>936-944</pages><issn>0916-8524</issn><issn>1745-1353</issn><eissn>1745-1353</eissn><abstract>Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. 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| identifier | ISSN: 0916-8524 |
| ispartof | IEICE Transactions on Electronics, 2008/06/01, Vol.E91.C(6), pp.936-944 |
| issn | 0916-8524 1745-1353 1745-1353 |
| language | eng |
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| source | J-STAGE (Japan Science & Technology Information Aggregator, Electronic) Freely Available Titles - Japanese |
| subjects | Circuit boards Circuits Electric potential electro magnetic interference Electronics Immunity integrated circuit Large scale integration Malfunctions on-chip monitor Voltage |
| title | Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation |
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