A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application
A slow-wave microstrip line (S-MSL) designed in 0.13 μm CMOS technology with a high-Q and a high dielectric constant is proposed in this letter. Grounded metal strips with two metal layers are located in zigzags in order to prevent penetration of the electric field into the silicon substrate. These...
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| Veröffentlicht in: | IEEE microwave and wireless components letters 2010-07, Vol.20 (7), p.381-383 |
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| creator | Lee, Jae Jin Park, Chul Soon |
| description | A slow-wave microstrip line (S-MSL) designed in 0.13 μm CMOS technology with a high-Q and a high dielectric constant is proposed in this letter. Grounded metal strips with two metal layers are located in zigzags in order to prevent penetration of the electric field into the silicon substrate. These metal strips equate the potentials of the ground planes and thus eliminate the parasitic coupled slotline mode without requiring additional air-bridges. Also, locating the ground planes in the SiO 2 layers instead of on the top metal reduces the size of the gap between the signal line and ground planes relative to the conventional structure. This allows relaxation of the metal density rule of the CMOS processes. Measured results for the proposed S-MSL show that the relative permittivity is 25 and the quality factor ranges from 18 to 37.7 between 20 and 60 GHz. The wavelength of the measured 253 μm S-MSL is 4/λ at 60 GHz. |
| doi_str_mv | 10.1109/LMWC.2010.2049430 |
| format | Article |
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Grounded metal strips with two metal layers are located in zigzags in order to prevent penetration of the electric field into the silicon substrate. These metal strips equate the potentials of the ground planes and thus eliminate the parasitic coupled slotline mode without requiring additional air-bridges. Also, locating the ground planes in the SiO 2 layers instead of on the top metal reduces the size of the gap between the signal line and ground planes relative to the conventional structure. This allows relaxation of the metal density rule of the CMOS processes. Measured results for the proposed S-MSL show that the relative permittivity is 25 and the quality factor ranges from 18 to 37.7 between 20 and 60 GHz. The wavelength of the measured 253 μm S-MSL is 4/λ at 60 GHz.</description><identifier>ISSN: 1531-1309</identifier><identifier>ISSN: 2771-957X</identifier><identifier>EISSN: 1558-1764</identifier><identifier>EISSN: 2771-9588</identifier><identifier>DOI: 10.1109/LMWC.2010.2049430</identifier><identifier>CODEN: IMWCBJ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>CMOS ; CMOS process ; CMOS technology ; coplanar waveguide (CPW) ; Density ; Dielectric constant ; Dielectric substrates ; Ground plane ; High-K gate dielectrics ; Metal strips ; Microstrip ; Microstrip lines ; Microwaves ; Millimeter wave technology ; millimeter-wave ; Permittivity measurement ; Sensors ; Silicon ; Slotline ; slow-wave microstrip line ; slow-wave transmission line (SWTL) ; Wavelength measurement ; Wavelengths</subject><ispartof>IEEE microwave and wireless components letters, 2010-07, Vol.20 (7), p.381-383</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Jul 2010</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c325t-b0a6ef66ea1aded8498ddb9caba0440e76a550558cf339c9e55ad9fe33ef72753</citedby><cites>FETCH-LOGICAL-c325t-b0a6ef66ea1aded8498ddb9caba0440e76a550558cf339c9e55ad9fe33ef72753</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5483165$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5483165$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lee, Jae Jin</creatorcontrib><creatorcontrib>Park, Chul Soon</creatorcontrib><title>A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application</title><title>IEEE microwave and wireless components letters</title><addtitle>LMWC</addtitle><description>A slow-wave microstrip line (S-MSL) designed in 0.13 μm CMOS technology with a high-Q and a high dielectric constant is proposed in this letter. Grounded metal strips with two metal layers are located in zigzags in order to prevent penetration of the electric field into the silicon substrate. These metal strips equate the potentials of the ground planes and thus eliminate the parasitic coupled slotline mode without requiring additional air-bridges. Also, locating the ground planes in the SiO 2 layers instead of on the top metal reduces the size of the gap between the signal line and ground planes relative to the conventional structure. This allows relaxation of the metal density rule of the CMOS processes. Measured results for the proposed S-MSL show that the relative permittivity is 25 and the quality factor ranges from 18 to 37.7 between 20 and 60 GHz. The wavelength of the measured 253 μm S-MSL is 4/λ at 60 GHz.</description><subject>CMOS</subject><subject>CMOS process</subject><subject>CMOS technology</subject><subject>coplanar waveguide (CPW)</subject><subject>Density</subject><subject>Dielectric constant</subject><subject>Dielectric substrates</subject><subject>Ground plane</subject><subject>High-K gate dielectrics</subject><subject>Metal strips</subject><subject>Microstrip</subject><subject>Microstrip lines</subject><subject>Microwaves</subject><subject>Millimeter wave technology</subject><subject>millimeter-wave</subject><subject>Permittivity measurement</subject><subject>Sensors</subject><subject>Silicon</subject><subject>Slotline</subject><subject>slow-wave microstrip line</subject><subject>slow-wave transmission line (SWTL)</subject><subject>Wavelength measurement</subject><subject>Wavelengths</subject><issn>1531-1309</issn><issn>2771-957X</issn><issn>1558-1764</issn><issn>2771-9588</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkF1LwzAUhosoOKc_QLwJeOFVZ9IkbXM56seEjiFTdlmy9NRl9MskU_z3pnR44dXJgee85-QJgmuCZ4RgcZ8vN9kswr6NMBOM4pNgQjhPQ5LE7HR4UxISisV5cGHtHmPCUkYmQTNH67r7DjfyC9BSK9NZZ3SPct0C2mi3QxIt9McufEWyLY8NetBQg_KgQlnXWidbh6rO-IC61g04MGNgtlyt0bzva62k0117GZxVsrZwdazT4P3p8S1bhPnq-SWb56GiEXfhFssYqjgGSWQJZcpEWpZboeRWYsYwJLHkHPvfqYpSoQRwLktRAaVQJVHC6TS4G3N7030ewLqi0VZBXcsWuoMtUpKmlIgEe_L2H7nvDqb1xxUER0lEMcMDRUZq8GMNVEVvdCPNj4eKwX8x-C8G_8XRv5-5GWc0APzxnPnFMae_dn2AUg</recordid><startdate>201007</startdate><enddate>201007</enddate><creator>Lee, Jae Jin</creator><creator>Park, Chul Soon</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201007</creationdate><title>A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application</title><author>Lee, Jae Jin ; Park, Chul Soon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c325t-b0a6ef66ea1aded8498ddb9caba0440e76a550558cf339c9e55ad9fe33ef72753</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><topic>CMOS</topic><topic>CMOS process</topic><topic>CMOS technology</topic><topic>coplanar waveguide (CPW)</topic><topic>Density</topic><topic>Dielectric constant</topic><topic>Dielectric substrates</topic><topic>Ground plane</topic><topic>High-K gate dielectrics</topic><topic>Metal strips</topic><topic>Microstrip</topic><topic>Microstrip lines</topic><topic>Microwaves</topic><topic>Millimeter wave technology</topic><topic>millimeter-wave</topic><topic>Permittivity measurement</topic><topic>Sensors</topic><topic>Silicon</topic><topic>Slotline</topic><topic>slow-wave microstrip line</topic><topic>slow-wave transmission line (SWTL)</topic><topic>Wavelength measurement</topic><topic>Wavelengths</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lee, Jae Jin</creatorcontrib><creatorcontrib>Park, Chul Soon</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE microwave and wireless components letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, Jae Jin</au><au>Park, Chul Soon</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application</atitle><jtitle>IEEE microwave and wireless components letters</jtitle><stitle>LMWC</stitle><date>2010-07</date><risdate>2010</risdate><volume>20</volume><issue>7</issue><spage>381</spage><epage>383</epage><pages>381-383</pages><issn>1531-1309</issn><issn>2771-957X</issn><eissn>1558-1764</eissn><eissn>2771-9588</eissn><coden>IMWCBJ</coden><abstract>A slow-wave microstrip line (S-MSL) designed in 0.13 μm CMOS technology with a high-Q and a high dielectric constant is proposed in this letter. Grounded metal strips with two metal layers are located in zigzags in order to prevent penetration of the electric field into the silicon substrate. These metal strips equate the potentials of the ground planes and thus eliminate the parasitic coupled slotline mode without requiring additional air-bridges. Also, locating the ground planes in the SiO 2 layers instead of on the top metal reduces the size of the gap between the signal line and ground planes relative to the conventional structure. This allows relaxation of the metal density rule of the CMOS processes. Measured results for the proposed S-MSL show that the relative permittivity is 25 and the quality factor ranges from 18 to 37.7 between 20 and 60 GHz. The wavelength of the measured 253 μm S-MSL is 4/λ at 60 GHz.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LMWC.2010.2049430</doi><tpages>3</tpages></addata></record> |
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| ispartof | IEEE microwave and wireless components letters, 2010-07, Vol.20 (7), p.381-383 |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | CMOS CMOS process CMOS technology coplanar waveguide (CPW) Density Dielectric constant Dielectric substrates Ground plane High-K gate dielectrics Metal strips Microstrip Microstrip lines Microwaves Millimeter wave technology millimeter-wave Permittivity measurement Sensors Silicon Slotline slow-wave microstrip line slow-wave transmission line (SWTL) Wavelength measurement Wavelengths |
| title | A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application |
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