Complementary Symmetry Silicon Nanowire Logic: Power-Efficient Inverters with Gain
Wired for high performance: The role of relative surface area in Si nanowire (NW) transistor (see image) performance was examined by comparing the performance of microwire (μW) field‐effect transistors (FETs) fabricated side‐by‐side with NW FETs. Both n‐ and p‐type NW FETs were found to be more sens...
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| Veröffentlicht in: | Small (Weinheim an der Bergstrasse, Germany) Germany), 2006-10, Vol.2 (10), p.1153-1158 |
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| creator | Wang, Dunwei Sheriff, Bonnie A. Heath, James R. |
| description | Wired for high performance: The role of relative surface area in Si nanowire (NW) transistor (see image) performance was examined by comparing the performance of microwire (μW) field‐effect transistors (FETs) fabricated side‐by‐side with NW FETs. Both n‐ and p‐type NW FETs were found to be more sensitive to surface states than their μW counterparts; these results are utilized to produce NW n‐FETs with consistent performance. |
| doi_str_mv | 10.1002/smll.200600249 |
| format | Article |
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| subjects | Boron Crystallization Electric Wiring Electronics field-effect transistors nanotechnology Nanotechnology - instrumentation Nanotechnology - methods Nanotubes nanowires Nanowires - chemistry Phosphorus - chemistry Semiconductors silicon Silicon - chemistry Temperature |
| title | Complementary Symmetry Silicon Nanowire Logic: Power-Efficient Inverters with Gain |
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