Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation

In this paper, we present a technique for compact representation of execution sequences in terms of efficient looping constructs. Here, by a looping construct, we mean a compact way of specifying a finite repetition of a set of execution primitives. Such compaction, which can be viewed as a form of...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Veröffentlicht in:	IEEE transactions on signal processing 2007-06, Vol.55 (6), p.3126-3138
Hauptverfasser:	Ming-Yung Ko, Zissulescu, C., Puthenpurayil, S., Bhattacharyya, S.S., Kienhuis, B., Deprettere, E.F.
Format:	Artikel
Sprache:	eng
Schlagworte:	Application software Applied sciences Array signal processing Coding, codes Compaction Computer programs Design automation Digital signal processing embedded systems Encoding Exact sciences and technology Field programmable gate arrays field-programmable gate arrays (FPGAs) Hardware high-level synthesis Information, signal and communications theory Mathematical models Miscellaneous program compilers reconfigurable design Representations Signal and communications theory Signal generators Signal processing Signal representation. Spectral analysis Signal synthesis Signal, noise Software Synthesis Telecommunications and information theory Very large scale integration
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Schreiben Sie den ersten Kommentar!