Rigorous diffraction simulations of topographic wafer stacks in double patterning

Double patterning is regarded as a potential candidate to achieve the 32 nm node in semiconductor manufacturing. A key problem for a standard litho-etch–litho-etch (LELE) double patterning process is to evaluate and tackle the impact of the wafer topography resulting from the hardmask pattern on the second lithography step. In this paper, we apply rigorous electromagnetic field (EMF) solvers to investigate the wafer topography effects. At first, the studied 3D mask is split into two masks. The topography resulting from the exposure with the first split mask is described by a patterned hardmask. Based on that, the bottom antireflective coating (BARC) thickness of the second wafer stack is optimized. Alternatively, a two beam interference and the full diffraction spectrum of the second mask are used as the illumination of the wafer stacks, respectively. Finally, simulated 3D resist profiles for different BARC thicknesses are shown. The importance of wafer topography impact, the optimization of topographic wafer stacks, and the possible solutions to compensate for the impact of the wafer topography are discussed.