A 5.2 GHz CMOS I/Q Modulator With Integrated Phase Shifter for Beamforming

This paper presents the design of an I/Q modulator with integrated phase shifter for beamforming. It is targeted at 802.11a WLAN. An efficient beamforming architecture with a linearly controlled 360 deg phase shifting range is proposed for linear transmitters. The phase shifting takes place in the l...

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Veröffentlicht in:IEEE journal of solid-state circuits 2007-09, Vol.42 (9), p.1953-1962
Hauptverfasser: Gueorguiev, S.., Lindfors, S.., Larsen, T..
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container_end_page 1962
container_issue 9
container_start_page 1953
container_title IEEE journal of solid-state circuits
container_volume 42
creator Gueorguiev, S..
Lindfors, S..
Larsen, T..
description This paper presents the design of an I/Q modulator with integrated phase shifter for beamforming. It is targeted at 802.11a WLAN. An efficient beamforming architecture with a linearly controlled 360 deg phase shifting range is proposed for linear transmitters. The phase shifting takes place in the local oscillator path at three times lower frequency than the carrier. The phase shifters are implemented as vector modulators in an efficient way by utilizing a current reuse technique. All control currents are provided by a single current steering digital to analog converter by means of time multiplexed sample and hold circuits. The circuit, implemented in 0.25 mum CMOS technology, has a 1 dB output compression point of -7.1 dBm and consumes 61 mA. It has a phase shifting resolution of 10 deg with a differential accuracy of 2 deg .
doi_str_mv 10.1109/JSSC.2007.903104
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It is targeted at 802.11a WLAN. An efficient beamforming architecture with a linearly controlled 360 deg phase shifting range is proposed for linear transmitters. The phase shifting takes place in the local oscillator path at three times lower frequency than the carrier. The phase shifters are implemented as vector modulators in an efficient way by utilizing a current reuse technique. All control currents are provided by a single current steering digital to analog converter by means of time multiplexed sample and hold circuits. The circuit, implemented in 0.25 mum CMOS technology, has a 1 dB output compression point of -7.1 dBm and consumes 61 mA. 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It is targeted at 802.11a WLAN. An efficient beamforming architecture with a linearly controlled 360 deg phase shifting range is proposed for linear transmitters. The phase shifting takes place in the local oscillator path at three times lower frequency than the carrier. The phase shifters are implemented as vector modulators in an efficient way by utilizing a current reuse technique. All control currents are provided by a single current steering digital to analog converter by means of time multiplexed sample and hold circuits. The circuit, implemented in 0.25 mum CMOS technology, has a 1 dB output compression point of -7.1 dBm and consumes 61 mA. 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source IEEE Electronic Library (IEL)
subjects Applied sciences
Array signal processing
Beamforming
Circuit properties
Circuits
Circuits of signal characteristics conditioning (including delay circuits)
CMOS
CMOS technology
Design. Technologies. Operation analysis. Testing
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Frequency
I/Q modulator
Integrated circuits
Local oscillators
Modulators
Multiplexing
Optical modulation
Oscillators
Oscillators, resonators, synthetizers
Phase modulation
phase shifter
Phase shifters
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal convertors
transmitter
Transmitters
Wireless communication
Wireless LAN
WLAN
title A 5.2 GHz CMOS I/Q Modulator With Integrated Phase Shifter for Beamforming
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