Exploring configurations of functional units in an out-of-order superscalar processor

This study has been carried out in order to determine cost-effective configurations of functional units for multiple-issue out-of-order superscalar processors. The trace-driven simulations were performed on the six integer and the fourteen floating-point programs from the SPEC 92 suite. We first eva...

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Bibliographische Detailangaben
Hauptverfasser:	Jourdan, Stéphan, Sainrat, Pascal, Litaize, Daniel
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Computer architecture Computer systems organization > Architectures > Parallel architectures Decoding Distributed computing Hardware > Electronic design automation > High-level and register-transfer level synthesis Hardware > Hardware validation > Functional verification > Simulation and emulation Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits Hardware > Very large scale integration design > VLSI packaging > Input > output styles Manufacturing Out of order Parallel processing Permission Pipelines Upper bound
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