A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms

In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hybrid reconfigurable architecture is considered so as the methodology can be applicable to a large number of heterogeneous...

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Bibliographische Detailangaben
Hauptverfasser:	Galanis, M. D., Milidonis, A., Theodoridis, G., Soudris, D., Goutis, C. E.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Acceleration Application software Computer applications Computer systems organization > Architectures > Other architectures > Reconfigurable computing Computer systems organization > Architectures > Other architectures > Self-organizing autonomic computing Field programmable gate arrays Hardware Hardware > Electronic design automation > Physical design (EDA) > Partitioning and floorplanning OFDM Physics computing Reconfigurable architectures Theory of computation > Randomness, geometry and discrete structures Theory of computation > Randomness, geometry and discrete structures > Computational geometry Theory of computation > Semantics and reasoning > Program reasoning > Program analysis Theory of computation > Semantics and reasoning > Program semantics Transmitters Very large scale integration
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