Janus Electronic Devices with Ultrathin High‑κ Gate Dielectric Directly Integrated on 1T′-MoTe2
Integrating high-quality dielectrics with two-dimensional (2D) transition metal chalcogenides (TMDCs) is crucial for high-performance electronics. However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to i...
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Veröffentlicht in: | ACS applied materials & interfaces 2024-12, Vol.16 (49), p.68211-68220 |
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creator | Chen, Enzi Zhu, Qing Duan, Yaoyu Tang, Junhao Zhan, Runze Huang, Jingwen Wan, Xi Chen, Kun Deng, Shaozhi |
description | Integrating high-quality dielectrics with two-dimensional (2D) transition metal chalcogenides (TMDCs) is crucial for high-performance electronics. However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to integrate ultrathin high-κ dielectric directly on 1T′-MoTe2 surfaces, facilitating the creation of high-performance back-gated field-effect transistors (FETs). Exploiting 1T′-MoTe2’s natural oxidation in ambient conditions, we directly deposit dense and uniform HfO2 dielectric films below 5 nm, achieving an equivalent oxide thickness (EOT) of 0.97 nm. The resulting back-gate transistors, with a monolayer MoSSe on HfO2/1T′-MoTe2, show a current on/off ratio over 105 and operate at low voltages ( |
doi_str_mv | 10.1021/acsami.4c15216 |
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However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to integrate ultrathin high-κ dielectric directly on 1T′-MoTe2 surfaces, facilitating the creation of high-performance back-gated field-effect transistors (FETs). Exploiting 1T′-MoTe2’s natural oxidation in ambient conditions, we directly deposit dense and uniform HfO2 dielectric films below 5 nm, achieving an equivalent oxide thickness (EOT) of 0.97 nm. The resulting back-gate transistors, with a monolayer MoSSe on HfO2/1T′-MoTe2, show a current on/off ratio over 105 and operate at low voltages (<1 V), indicating high gating efficiency and a charge carrier mobility of 2.93 cm2V–1s–1. Additionally, we demonstrate a 6 × 5 bottom-gated array of MoSSe transistors using all-1T′-MoTe2 electrodes, achieving an 86.7% sample yield. Our approach also enables the creation of various integrated logic circuits such as inverters, NAND, and NOR gates. This research offers a feasible method for integrating high-κ dielectric films using industrially compatible ALD processes, providing excellent thickness control, uniformity, and scalability for 2D electronic devices.</description><identifier>ISSN: 1944-8244</identifier><identifier>ISSN: 1944-8252</identifier><identifier>EISSN: 1944-8252</identifier><identifier>DOI: 10.1021/acsami.4c15216</identifier><language>eng</language><publisher>American Chemical Society</publisher><subject>Functional Nanostructured Materials (including low-D carbon)</subject><ispartof>ACS applied materials & interfaces, 2024-12, Vol.16 (49), p.68211-68220</ispartof><rights>2024 American Chemical Society</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><orcidid>0000-0002-9654-7988 ; 0000-0002-8661-661X ; 0000-0003-1830-2026 ; 0000-0002-3524-289X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://pubs.acs.org/doi/pdf/10.1021/acsami.4c15216$$EPDF$$P50$$Gacs$$H</linktopdf><linktohtml>$$Uhttps://pubs.acs.org/doi/10.1021/acsami.4c15216$$EHTML$$P50$$Gacs$$H</linktohtml><link.rule.ids>314,780,784,27076,27924,27925,56738,56788</link.rule.ids></links><search><creatorcontrib>Chen, Enzi</creatorcontrib><creatorcontrib>Zhu, Qing</creatorcontrib><creatorcontrib>Duan, Yaoyu</creatorcontrib><creatorcontrib>Tang, Junhao</creatorcontrib><creatorcontrib>Zhan, Runze</creatorcontrib><creatorcontrib>Huang, Jingwen</creatorcontrib><creatorcontrib>Wan, Xi</creatorcontrib><creatorcontrib>Chen, Kun</creatorcontrib><creatorcontrib>Deng, Shaozhi</creatorcontrib><title>Janus Electronic Devices with Ultrathin High‑κ Gate Dielectric Directly Integrated on 1T′-MoTe2</title><title>ACS applied materials & interfaces</title><addtitle>ACS Appl. Mater. Interfaces</addtitle><description>Integrating high-quality dielectrics with two-dimensional (2D) transition metal chalcogenides (TMDCs) is crucial for high-performance electronics. However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to integrate ultrathin high-κ dielectric directly on 1T′-MoTe2 surfaces, facilitating the creation of high-performance back-gated field-effect transistors (FETs). Exploiting 1T′-MoTe2’s natural oxidation in ambient conditions, we directly deposit dense and uniform HfO2 dielectric films below 5 nm, achieving an equivalent oxide thickness (EOT) of 0.97 nm. The resulting back-gate transistors, with a monolayer MoSSe on HfO2/1T′-MoTe2, show a current on/off ratio over 105 and operate at low voltages (<1 V), indicating high gating efficiency and a charge carrier mobility of 2.93 cm2V–1s–1. Additionally, we demonstrate a 6 × 5 bottom-gated array of MoSSe transistors using all-1T′-MoTe2 electrodes, achieving an 86.7% sample yield. Our approach also enables the creation of various integrated logic circuits such as inverters, NAND, and NOR gates. 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Mater. Interfaces</addtitle><date>2024-12-11</date><risdate>2024</risdate><volume>16</volume><issue>49</issue><spage>68211</spage><epage>68220</epage><pages>68211-68220</pages><issn>1944-8244</issn><issn>1944-8252</issn><eissn>1944-8252</eissn><abstract>Integrating high-quality dielectrics with two-dimensional (2D) transition metal chalcogenides (TMDCs) is crucial for high-performance electronics. However, the lack of dangling bonds on 2D material surfaces complicates direct dielectric deposition. We propose using atomic layer deposition (ALD) to integrate ultrathin high-κ dielectric directly on 1T′-MoTe2 surfaces, facilitating the creation of high-performance back-gated field-effect transistors (FETs). Exploiting 1T′-MoTe2’s natural oxidation in ambient conditions, we directly deposit dense and uniform HfO2 dielectric films below 5 nm, achieving an equivalent oxide thickness (EOT) of 0.97 nm. The resulting back-gate transistors, with a monolayer MoSSe on HfO2/1T′-MoTe2, show a current on/off ratio over 105 and operate at low voltages (<1 V), indicating high gating efficiency and a charge carrier mobility of 2.93 cm2V–1s–1. Additionally, we demonstrate a 6 × 5 bottom-gated array of MoSSe transistors using all-1T′-MoTe2 electrodes, achieving an 86.7% sample yield. Our approach also enables the creation of various integrated logic circuits such as inverters, NAND, and NOR gates. This research offers a feasible method for integrating high-κ dielectric films using industrially compatible ALD processes, providing excellent thickness control, uniformity, and scalability for 2D electronic devices.</abstract><pub>American Chemical Society</pub><doi>10.1021/acsami.4c15216</doi><tpages>10</tpages><orcidid>https://orcid.org/0000-0002-9654-7988</orcidid><orcidid>https://orcid.org/0000-0002-8661-661X</orcidid><orcidid>https://orcid.org/0000-0003-1830-2026</orcidid><orcidid>https://orcid.org/0000-0002-3524-289X</orcidid></addata></record> |
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subjects | Functional Nanostructured Materials (including low-D carbon) |
title | Janus Electronic Devices with Ultrathin High‑κ Gate Dielectric Directly Integrated on 1T′-MoTe2 |
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