Memory dependence prediction using store sets

For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that write to the same memory location. One approach is to use memory dependence prediction to identify the stores upon which a l...

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Veröffentlicht in:	Annual International Symposium on Computer Architecture. 25th 1998-06, Vol.26 (3), p.142-153
Hauptverfasser:	Chrysos, George Z., Emer, Joel S.
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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