Processing techniques for refractory integrated circuits superconducting
Processing techniques have been developed to increase yields and uniformity in superconductor integrated circuits fabricated with refractory materials. An eight-level process was used to define a ground plane, ground plane insulator, Josephson junction base and counterelectrodes, a second insulator...
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Veröffentlicht in: | IEEE transactions on magnetics 1989-03, Vol.25 (2), p.1127-1130 |
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Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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