Processing techniques for refractory integrated circuits superconducting

Processing techniques have been developed to increase yields and uniformity in superconductor integrated circuits fabricated with refractory materials. An eight-level process was used to define a ground plane, ground plane insulator, Josephson junction base and counterelectrodes, a second insulator...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on magnetics 1989-03, Vol.25 (2), p.1127-1130
Hauptverfasser: Przybysz, J X, Blaugher, R D, Buttyan, J
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!