Electrothermal limitations on the current density of high-frequency bipolar transistors
In this paper, electrothermal consequences of downscaling bipolar transistors, reducing the emitter resistance and implementing substrate modifications are examined by means of electrical measurements, numerical simulations and analytical calculations. A formulation is given for the optimum current...
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Veröffentlicht in: | IEEE transactions on electron devices 2004-12, Vol.51 (12), p.2175-2180 |
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creator | Nenadovic, N. Nanver, L.K. Slotboom, J.W. |
description | In this paper, electrothermal consequences of downscaling bipolar transistors, reducing the emitter resistance and implementing substrate modifications are examined by means of electrical measurements, numerical simulations and analytical calculations. A formulation is given for the optimum current density that can be run through the device and still maintain both sufficient transconductance and thermal stability. This expression sets a theoretical limit on the current density and therefore also on the speed of the given technology node. Particularly the lowering of the emitter resistivity is a trade-off between transconductance and thermal stability, and the optimum choice can be estimated from these results along with the maximum emitter area that will allow unconditional thermal stability. |
doi_str_mv | 10.1109/TED.2004.839754 |
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A formulation is given for the optimum current density that can be run through the device and still maintain both sufficient transconductance and thermal stability. This expression sets a theoretical limit on the current density and therefore also on the speed of the given technology node. Particularly the lowering of the emitter resistivity is a trade-off between transconductance and thermal stability, and the optimum choice can be estimated from these results along with the maximum emitter area that will allow unconditional thermal stability.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2004.839754</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Bipolar transistors ; Conductivity ; Current ; Electronics ; emitter resistance ; Exact sciences and technology ; Heterojunction bipolar transistors ; high-frequency (HF) technologies ; Semiconductor electronics. Microelectronics. Optoelectronics. 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A formulation is given for the optimum current density that can be run through the device and still maintain both sufficient transconductance and thermal stability. This expression sets a theoretical limit on the current density and therefore also on the speed of the given technology node. Particularly the lowering of the emitter resistivity is a trade-off between transconductance and thermal stability, and the optimum choice can be estimated from these results along with the maximum emitter area that will allow unconditional thermal stability.</description><subject>Applied sciences</subject><subject>Bipolar transistors</subject><subject>Conductivity</subject><subject>Current</subject><subject>Electronics</subject><subject>emitter resistance</subject><subject>Exact sciences and technology</subject><subject>Heterojunction bipolar transistors</subject><subject>high-frequency (HF) technologies</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon on insulator technology</subject><subject>silicon-on-glass</subject><subject>thermal instability</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2004</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqNkUFrGzEQhUVJoW6acw-5iEJzW1vSaLXSsSROWwj04pKj0Gpna4X1ypHkg_99ZRwI5JTTMDPfDDPvEfKVsyXnzKw267ulYEwuNZiulR_Igrdt1xgl1QVZMMZ1Y0DDJ_I556eaKinFgjyuJ_QlxbLFtHMTncIuFFdCnDONM61l6g8p4VzogHMO5UjjSLfh37YZEz4fcPZH2od9nFyiJbmK5BJT_kI-jm7KePUSL8nf-_Xm9lfz8Ofn79sfD42Xgpem6zyA7hxvJUdoB3QONRPCSOiHHnrmlUNwyvMWO9WjcTCoYRy5MaYfxgEuyc157z7Fek0udheyx2lyM8ZDtkIbZjRr3wECNyBUBb-9AZ_iIc31Cau1rEpL6Cq0OkM-xZwTjnafws6lo-XMnuyw1Q57ssOe7agT31_WuuzdNFapfMivY0roFrSu3PWZC4j42gYljJbwHyxjlJU</recordid><startdate>20041201</startdate><enddate>20041201</enddate><creator>Nenadovic, N.</creator><creator>Nanver, L.K.</creator><creator>Slotboom, J.W.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicon on insulator technology</topic><topic>silicon-on-glass</topic><topic>thermal instability</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Nenadovic, N.</creatorcontrib><creatorcontrib>Nanver, L.K.</creatorcontrib><creatorcontrib>Slotboom, J.W.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Solid State and Superconductivity Abstracts</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Nenadovic, N.</au><au>Nanver, L.K.</au><au>Slotboom, J.W.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Electrothermal limitations on the current density of high-frequency bipolar transistors</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2004-12-01</date><risdate>2004</risdate><volume>51</volume><issue>12</issue><spage>2175</spage><epage>2180</epage><pages>2175-2180</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>In this paper, electrothermal consequences of downscaling bipolar transistors, reducing the emitter resistance and implementing substrate modifications are examined by means of electrical measurements, numerical simulations and analytical calculations. A formulation is given for the optimum current density that can be run through the device and still maintain both sufficient transconductance and thermal stability. This expression sets a theoretical limit on the current density and therefore also on the speed of the given technology node. Particularly the lowering of the emitter resistivity is a trade-off between transconductance and thermal stability, and the optimum choice can be estimated from these results along with the maximum emitter area that will allow unconditional thermal stability.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2004.839754</doi><tpages>6</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences Bipolar transistors Conductivity Current Electronics emitter resistance Exact sciences and technology Heterojunction bipolar transistors high-frequency (HF) technologies Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon on insulator technology silicon-on-glass thermal instability Transistors |
title | Electrothermal limitations on the current density of high-frequency bipolar transistors |
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