A method of fabricating metal-insulator-metal (MIM) capacitor in Cu/low- k backend interconnection process for RF application

To build Cu and low- k dielectric integrated MIM capacitor on standard CMOS silicon substrate for RFIC application, a Ta layer under the capacitor upper plate is necessary for preventing Cu diffusion into Si 3N 4 dielectric layer of capacitor. In the experiment, delamination was found after 1000 Å Ta film deposition on top of Si 3N 4. SEM inspection revealed that the delamination occurred at the interface between BD and Si 3N 4. The Ta/Si 3N 4 delamination was solved by inserting a SiO 2 layer between BD and Si 3N 4 layers to compensate the stress difference between the BD and Si 3N 4/Ta stack films. Full process technology based on Cu and low- k process line for integrating passive device on silicon substrate was thus successfully developed.