Bipolar transistor fabrication in low-temperature (745°C) ultra-low-pressure chemical-vapor-deposited epitaxial silicon

In this letter we report for the first time the successful fabrication of bipolar transistors in low-temperature (T dep = 745°C) epitaxial silicon deposited by a chemical-vapor-deposition (CVD) technology. The epitaxial layers were deposited by an ultra-low-pressure CVD (U-LPCVD) technique utilizing...

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Veröffentlicht in:	IEEE electron device letters 1987-04, Vol.8 (4), p.168-170
Hauptverfasser:	Burger, W.R., Comfort, J.H., Garverick, L.M., Yew, T.R., Reif, R.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Argon Bipolar transistors Chemical technology Chemical vapor deposition Electronics Epitaxial layers Etching Exact sciences and technology Fabrication Microelectronic fabrication (materials and surfaces technology) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Substrates Voltage
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container_end_page	170
container_issue	4
container_start_page	168
container_title	IEEE electron device letters
container_volume	8
creator	Burger, W.R. Comfort, J.H. Garverick, L.M. Yew, T.R. Reif, R.
description	In this letter we report for the first time the successful fabrication of bipolar transistors in low-temperature (T dep = 745°C) epitaxial silicon deposited by a chemical-vapor-deposition (CVD) technology. The epitaxial layers were deposited by an ultra-low-pressure CVD (U-LPCVD) technique utilizing an optimized in-situ predeposition argon sputter clean. The critical parameter during the sputter clean has been identified as the substrate bias. Bias voltages of -200 or -300 V create dislocations that form emitter-collector shunts during the bipolar transistor fabrication process; a bias voltage of -100 V, however, permits the deposition of essentially defect-free (
doi_str_mv	10.1109/EDL.1987.26590
format	Article
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The epitaxial layers were deposited by an ultra-low-pressure CVD (U-LPCVD) technique utilizing an optimized in-situ predeposition argon sputter clean. The critical parameter during the sputter clean has been identified as the substrate bias. Bias voltages of -200 or -300 V create dislocations that form emitter-collector shunts during the bipolar transistor fabrication process; a bias voltage of -100 V, however, permits the deposition of essentially defect-free (<10 dislocations cm -2 by defect etching) epitaxial films suitable for bipolar transistor fabrication.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/EDL.1987.26590</doi><tpages>3</tpages></addata></record>
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subjects	Applied sciences Argon Bipolar transistors Chemical technology Chemical vapor deposition Electronics Epitaxial layers Etching Exact sciences and technology Fabrication Microelectronic fabrication (materials and surfaces technology) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Substrates Voltage
title	Bipolar transistor fabrication in low-temperature (745°C) ultra-low-pressure chemical-vapor-deposited epitaxial silicon
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