Protocol wrappers for layered network packet processing in reconfigurable hardware
A library of layered protocol wrappers processes Internet packets in reconfigurable hardware. Collectively, the wrappers simplify and streamline the implementation of high-level networking functions by abstracting the operation of lower-level packet processing functions. The library synthesizes into...
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| Veröffentlicht in: | IEEE MICRO 2002-01, Vol.22 (1), p.66-74 |
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| container_end_page | 74 |
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| container_title | IEEE MICRO |
| container_volume | 22 |
| creator | Braun, F. Lockwood, J. Waldvogel, M. |
| description | A library of layered protocol wrappers processes Internet packets in reconfigurable hardware. Collectively, the wrappers simplify and streamline the implementation of high-level networking functions by abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform called the field-programmable port extender (FPX). The library processes asynchronous transfer mode (ATM) cells, ATM adaptation layer 5 (AAL5) frames, Internet protocol (IP) messages, and user datagrarn protocol (UDP) packets directly in hardware. Applications can process data at several layers of the protocol stack using the library of wrappers discussed in this article. Layers are important for networks because they let applications abstract from above and below details of the network protocols. At the lowest layer, networks modify raw data passing between interfaces. At higher levels, the applications process variable length frames or IP packets.A network platform called the field-programmable port extender (FPX) streamlines and simplifies network transmission processing directly in hardware. |
| doi_str_mv | 10.1109/40.988691 |
| format | Article |
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Collectively, the wrappers simplify and streamline the implementation of high-level networking functions by abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform called the field-programmable port extender (FPX). The library processes asynchronous transfer mode (ATM) cells, ATM adaptation layer 5 (AAL5) frames, Internet protocol (IP) messages, and user datagrarn protocol (UDP) packets directly in hardware. Applications can process data at several layers of the protocol stack using the library of wrappers discussed in this article. Layers are important for networks because they let applications abstract from above and below details of the network protocols. At the lowest layer, networks modify raw data passing between interfaces. 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| ispartof | IEEE MICRO, 2002-01, Vol.22 (1), p.66-74 |
| issn | 0272-1732 1937-4143 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Asynchronous transfer mode Computer networks Computer peripherals Field programmable gate arrays Hardware Internet Internet Protocol IP (Internet Protocol) Libraries Logic arrays Logic gates Network synthesis Networks Packet switched networks Packets (communication) Platforms Protocols Reconfigurable hardware Reconfigurable logic |
| title | Protocol wrappers for layered network packet processing in reconfigurable hardware |
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