Novel resonant tunneling transistor with high transconductance at room temperature
A resonant tunneling transistor (RTT) utilizing a novel heterodimensional Schottky gate technology is described. The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two d...
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Veröffentlicht in: | IEEE electron device letters 1994-07, Vol.15 (7), p.236-238 |
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creator | Peatman, W.C.B. Brown, E.R. Rooks, M.J. Maki, P. Grimm, W.J. Shur, M. |
description | A resonant tunneling transistor (RTT) utilizing a novel heterodimensional Schottky gate technology is described. The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two dimensional electron accumulation layer which forms above the source barrier under drain-source bias. Room temperature transistor characteristics included a peak current of 225 mA/mm and peak transconductance of 218 mS/mm. The ultrafine fabrication process is also discussed.< > |
doi_str_mv | 10.1109/55.294081 |
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The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two dimensional electron accumulation layer which forms above the source barrier under drain-source bias. Room temperature transistor characteristics included a peak current of 225 mA/mm and peak transconductance of 218 mS/mm. The ultrafine fabrication process is also discussed.< ></description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.294081</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Electronics ; Electrons ; Etching ; Exact sciences and technology ; Gallium arsenide ; Gold ; Lithography ; Resonant tunneling devices ; Schottky barriers ; Semiconductor electronics. Microelectronics. Optoelectronics. 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The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two dimensional electron accumulation layer which forms above the source barrier under drain-source bias. Room temperature transistor characteristics included a peak current of 225 mA/mm and peak transconductance of 218 mS/mm. The ultrafine fabrication process is also discussed.< ></description><subject>Applied sciences</subject><subject>Electronics</subject><subject>Electrons</subject><subject>Etching</subject><subject>Exact sciences and technology</subject><subject>Gallium arsenide</subject><subject>Gold</subject><subject>Lithography</subject><subject>Resonant tunneling devices</subject><subject>Schottky barriers</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Temperature</subject><subject>Transconductance</subject><subject>Transistors</subject><subject>Voltage</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1994</creationdate><recordtype>article</recordtype><recordid>eNqNkU1Lw0AQhhdRsFYPXj3lIIKH1NlkZ7M5SvELioLoOWy3kzaS7tbdjeK_NyWl554GZp55ZuBl7JLDhHMo7xAnWSlA8SM24ogqBZT5MRtBIXiac5Cn7CyELwAuRCFG7P3V_VCbeArOahuT2FlLbWOXSfTahiZE55PfJq6SVbNcDU3j7KIzUVtDiY6Jd26dRFpvyOvYeTpnJ7VuA13s6ph9Pj58TJ_T2dvTy_R-lhqRQ0wziUYUGWZQUoELVWO9QNCUoVSZKjMzB15ILhTNCfpf50LBYp4V_VqtaiPzMbsZvBvvvjsKsVo3wVDbakuuC1UvKaUU6gBQASqBB4BC8rw44LREFCDzQ0DOFW6NtwNovAvBU11tfLPW_q_iUG2TrRCrIdmevd5JdTC6rftMTBP2C3kO5YBdDVhDRPvpzvEPcrep-g</recordid><startdate>19940701</startdate><enddate>19940701</enddate><creator>Peatman, W.C.B.</creator><creator>Brown, E.R.</creator><creator>Rooks, M.J.</creator><creator>Maki, P.</creator><creator>Grimm, W.J.</creator><creator>Shur, M.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope><scope>7SP</scope><scope>7U5</scope><scope>7QF</scope><scope>8BQ</scope><scope>JG9</scope></search><sort><creationdate>19940701</creationdate><title>Novel resonant tunneling transistor with high transconductance at room temperature</title><author>Peatman, W.C.B. ; Brown, E.R. ; Rooks, M.J. ; Maki, P. ; Grimm, W.J. ; Shur, M.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c430t-265c4725209e75d8f5fd50ae25682892cb0176148ebe0474b480db2765cf8fc63</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1994</creationdate><topic>Applied sciences</topic><topic>Electronics</topic><topic>Electrons</topic><topic>Etching</topic><topic>Exact sciences and technology</topic><topic>Gallium arsenide</topic><topic>Gold</topic><topic>Lithography</topic><topic>Resonant tunneling devices</topic><topic>Schottky barriers</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Temperature</topic><topic>Transconductance</topic><topic>Transistors</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Peatman, W.C.B.</creatorcontrib><creatorcontrib>Brown, E.R.</creatorcontrib><creatorcontrib>Rooks, M.J.</creatorcontrib><creatorcontrib>Maki, P.</creatorcontrib><creatorcontrib>Grimm, W.J.</creatorcontrib><creatorcontrib>Shur, M.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Aluminium Industry Abstracts</collection><collection>METADEX</collection><collection>Materials Research Database</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Peatman, W.C.B.</au><au>Brown, E.R.</au><au>Rooks, M.J.</au><au>Maki, P.</au><au>Grimm, W.J.</au><au>Shur, M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Novel resonant tunneling transistor with high transconductance at room temperature</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1994-07-01</date><risdate>1994</risdate><volume>15</volume><issue>7</issue><spage>236</spage><epage>238</epage><pages>236-238</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>A resonant tunneling transistor (RTT) utilizing a novel heterodimensional Schottky gate technology is described. The gate is formed by electroplating Pt/Au onto the side of an AlGaAs/GaAs double barrier structure. The gate voltage modulates the drain current by modulating the area of the quasi-two dimensional electron accumulation layer which forms above the source barrier under drain-source bias. Room temperature transistor characteristics included a peak current of 225 mA/mm and peak transconductance of 218 mS/mm. The ultrafine fabrication process is also discussed.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/55.294081</doi><tpages>3</tpages></addata></record> |
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ispartof | IEEE electron device letters, 1994-07, Vol.15 (7), p.236-238 |
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source | IEEE Electronic Library (IEL) |
subjects | Applied sciences Electronics Electrons Etching Exact sciences and technology Gallium arsenide Gold Lithography Resonant tunneling devices Schottky barriers Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Temperature Transconductance Transistors Voltage |
title | Novel resonant tunneling transistor with high transconductance at room temperature |
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