Impact of interface impurities on heterostructure field-effect transistors
The influence of C and Si impurities at the substrate/epitaxy interface on the threshold voltage of GaAs/AlGaAs selectively doped heterostructure transistors has been investigated both experimentally and theoretically using a one-dimensional simulation. The presence of C raises the conduction band r...
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| Veröffentlicht in: | IEEE transactions on electron devices 1992-11, Vol.39 (11), p.2459-2464 |
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| container_end_page | 2464 |
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| container_issue | 11 |
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| container_title | IEEE transactions on electron devices |
| container_volume | 39 |
| creator | Reynolds, C.L. Vuong, H.H.T. Peticolas, L.J. |
| description | The influence of C and Si impurities at the substrate/epitaxy interface on the threshold voltage of GaAs/AlGaAs selectively doped heterostructure transistors has been investigated both experimentally and theoretically using a one-dimensional simulation. The presence of C raises the conduction band relative to the Fermi level and reduces the electron density in the channel. This results in a positive shift of the depletion-mode (DFET) threshold voltage as the interfacial C concentration increases. For low C concentrations the DFET threshold voltage decreases with increasing Si at the interface. The impact of interfacial C and Si is small on the enhancement-mode (EFET) threshold voltage.< > |
| doi_str_mv | 10.1109/16.163458 |
| format | Article |
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The presence of C raises the conduction band relative to the Fermi level and reduces the electron density in the channel. This results in a positive shift of the depletion-mode (DFET) threshold voltage as the interfacial C concentration increases. For low C concentrations the DFET threshold voltage decreases with increasing Si at the interface. The impact of interfacial C and Si is small on the enhancement-mode (EFET) threshold voltage.< ></description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.163458</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Contamination ; Electronics ; Epitaxial growth ; Exact sciences and technology ; FETs ; Gallium arsenide ; HEMTs ; Impurities ; MODFETs ; Molecular beam epitaxial growth ; Semiconductor electronics. Microelectronics. Optoelectronics. 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The presence of C raises the conduction band relative to the Fermi level and reduces the electron density in the channel. This results in a positive shift of the depletion-mode (DFET) threshold voltage as the interfacial C concentration increases. For low C concentrations the DFET threshold voltage decreases with increasing Si at the interface. The impact of interfacial C and Si is small on the enhancement-mode (EFET) threshold voltage.< ></description><subject>Applied sciences</subject><subject>Contamination</subject><subject>Electronics</subject><subject>Epitaxial growth</subject><subject>Exact sciences and technology</subject><subject>FETs</subject><subject>Gallium arsenide</subject><subject>HEMTs</subject><subject>Impurities</subject><subject>MODFETs</subject><subject>Molecular beam epitaxial growth</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Microelectronics. Optoelectronics. Solid state devices</topic><topic>Substrates</topic><topic>Threshold voltage</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Reynolds, C.L.</creatorcontrib><creatorcontrib>Vuong, H.H.T.</creatorcontrib><creatorcontrib>Peticolas, L.J.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Aluminium Industry Abstracts</collection><collection>METADEX</collection><collection>Materials Research Database</collection><collection>Solid State and Superconductivity Abstracts</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Reynolds, C.L.</au><au>Vuong, H.H.T.</au><au>Peticolas, L.J.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Impact of interface impurities on heterostructure field-effect transistors</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>1992-11-01</date><risdate>1992</risdate><volume>39</volume><issue>11</issue><spage>2459</spage><epage>2464</epage><pages>2459-2464</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The influence of C and Si impurities at the substrate/epitaxy interface on the threshold voltage of GaAs/AlGaAs selectively doped heterostructure transistors has been investigated both experimentally and theoretically using a one-dimensional simulation. The presence of C raises the conduction band relative to the Fermi level and reduces the electron density in the channel. This results in a positive shift of the depletion-mode (DFET) threshold voltage as the interfacial C concentration increases. For low C concentrations the DFET threshold voltage decreases with increasing Si at the interface. The impact of interfacial C and Si is small on the enhancement-mode (EFET) threshold voltage.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/16.163458</doi><tpages>6</tpages></addata></record> |
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| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 1992-11, Vol.39 (11), p.2459-2464 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_proquest_miscellaneous_28802196 |
| source | IEEE/IET Electronic Library |
| subjects | Applied sciences Contamination Electronics Epitaxial growth Exact sciences and technology FETs Gallium arsenide HEMTs Impurities MODFETs Molecular beam epitaxial growth Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Substrates Threshold voltage Transistors |
| title | Impact of interface impurities on heterostructure field-effect transistors |
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