Shrinkable triple self-aligned field-enhanced split-gate flash memory

This paper demonstrates a shrinkable triple self-aligned split-gate flash cell fabricated using a standard 0.13-/spl mu/m copper interconnect process. The approach used here to create a self-aligned structure is to form a spacer against the prior layer. Due to a higher aspect ratio when the cell pit...

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Veröffentlicht in:IEEE transactions on electron devices 2004-10, Vol.51 (10), p.1667-1671
Hauptverfasser: Wen-Ting Chu, Hao-Hsiung Lin, Chia-Ta Hsieh, Hung-Cheng Sung, Yu-Hsiung Wang, Yung-Tao Lin, Wang, C.S.
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Sprache:eng
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