Modified polycrystalline silicon chemical-vapor deposition process for improving roughness at oxide/polycrystalline silicon interface

A new modified low pressure chemical-vapor deposition process for stacked polysilicon (poly-Si) films is developed in this study. The proposed stacked film process combines polysilicon with amorphous silicon films. In this process, polysilicon film was deposited first at 630 °C, followed by a contin...

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Veröffentlicht in:Thin solid films 2005-01, Vol.472 (1), p.164-168
Hauptverfasser: Chang, J.J., Hsieh, T.E., Wang, Y.L., Tseng, W.T., Liu, C.P., Lan, C.Y.
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container_end_page 168
container_issue 1
container_start_page 164
container_title Thin solid films
container_volume 472
creator Chang, J.J.
Hsieh, T.E.
Wang, Y.L.
Tseng, W.T.
Liu, C.P.
Lan, C.Y.
description A new modified low pressure chemical-vapor deposition process for stacked polysilicon (poly-Si) films is developed in this study. The proposed stacked film process combines polysilicon with amorphous silicon films. In this process, polysilicon film was deposited first at 630 °C, followed by a continuous temperature decrease down to 560 °C for the deposition of amorphous silicon film. It was found that the doped stacked polysilicon films deposited by this process result in lowering of surface roughness, together with reduction of the (311) phase of the doped amorphous silicon and (110) phase of the doped polysilicon. As a consequence, device performance based on the stacked films also improves. Results of surface roughness analysis indicated that the doped stacked polysilicon film has a root-mean square surface roughness (Rrms) of 78 Å, which is smaller than those of doped conventional (630 °C) polysilicon film (Rrms=97 Å), and doped amorphous silicon film (Rrms=123 Å, deposited at 560 °C). Transmission electron microscopic (TEM) observation performed at oxide/polysilicon interface showed that the conventional (630 °C) oxide/polysilicon interface has high angle grain boundaries on the polysilicon side, which may induce leakage current around the interfacial area.
doi_str_mv 10.1016/j.tsf.2004.06.165
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The proposed stacked film process combines polysilicon with amorphous silicon films. In this process, polysilicon film was deposited first at 630 °C, followed by a continuous temperature decrease down to 560 °C for the deposition of amorphous silicon film. It was found that the doped stacked polysilicon films deposited by this process result in lowering of surface roughness, together with reduction of the (311) phase of the doped amorphous silicon and (110) phase of the doped polysilicon. As a consequence, device performance based on the stacked films also improves. Results of surface roughness analysis indicated that the doped stacked polysilicon film has a root-mean square surface roughness (Rrms) of 78 Å, which is smaller than those of doped conventional (630 °C) polysilicon film (Rrms=97 Å), and doped amorphous silicon film (Rrms=123 Å, deposited at 560 °C). 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subjects Annealing
Grain boundary
Silicon
Silicon oxide
title Modified polycrystalline silicon chemical-vapor deposition process for improving roughness at oxide/polycrystalline silicon interface
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