Plasma charging damage on MOS devices with gate insulator of high-dielectric constant material

Plasma charging effects on the gate insulator of high-dielectric constant (k) material in MOS devices deserve to be investigated because of different trap-assisted conduction mechanisms. Plasma-induced degradation in gate-leakage current and time to breakdown is clearly observed in this work. MOS de...

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Veröffentlicht in:IEEE electron device letters 2001-11, Vol.22 (11), p.527-529
Hauptverfasser: Pei-Jer Tzeng, Yi-Yuan Chang, Kuei-Shu Chang-Liao
Format: Artikel
Sprache:eng
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Zusammenfassung:Plasma charging effects on the gate insulator of high-dielectric constant (k) material in MOS devices deserve to be investigated because of different trap-assisted conduction mechanisms. Plasma-induced degradation in gate-leakage current and time to breakdown is clearly observed in this work. MOS device with Si/sub 3/N/sub 4/ film seems to have smaller degradation of gate-leakage current while it suffers shorter time to breakdown as compared to Ta/sub 2/O/sub 5/ samples. For devices with Ta/sub 2/O/sub 5/ film, a larger physical thickness suffers more reliability degradation from plasma charging damage because of the richer traps. Thus, a smaller physical thickness of high-k dielectric film is favorable for sub-micron MOS devices of ULSI application.
ISSN:0741-3106
1558-0563
DOI:10.1109/55.962652