A low-power 170-MHz discrete-time analog FIR filter

A 170-MHz analog finite impulse response (FIR) filter operating from a single 3.3-V supply is described. The design has been fabricated in the HP 1.2-/spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE journal of solid-state circuits 1998-03, Vol.33 (3), p.417-426
Hauptverfasser: Xiaodong Wang, Spencer, R.R.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 426
container_issue 3
container_start_page 417
container_title IEEE journal of solid-state circuits
container_volume 33
creator Xiaodong Wang
Spencer, R.R.
description A 170-MHz analog finite impulse response (FIR) filter operating from a single 3.3-V supply is described. The design has been fabricated in the HP 1.2-/spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using multiplying digital-to-analog converters (MDAC's) with 6-b resolution.
doi_str_mv 10.1109/4.661207
format Article
fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_proquest_miscellaneous_28350114</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>661207</ieee_id><sourcerecordid>28350114</sourcerecordid><originalsourceid>FETCH-LOGICAL-c275t-3d320ff49defaa3c6b50297107fcbe4bdf84b0bf6c380325b08dde92ca002813</originalsourceid><addsrcrecordid>eNo90MFLwzAUBvAgCtYpePbUk3jJfC9J2_Q4hnODiSA7eAtp-iKVbp1Jx9C_3kqHp8fj_fh4fIzdIkwRoXxU0zxHAcUZSzDLNMdCvp-zBAA1LwXAJbuK8XNYldKYMDlL2-7I992RQooF8JflT1o30QXqiffNllK7s233kS5Wb6lv2p7CNbvwto10c5oTtlk8beZLvn59Xs1na-5EkfVc1lKA96qsyVsrXV5lIMoCofCuIlXVXqsKKp87qUGKrAJd11QKZwGERjlh92PsPnRfB4q92Q5_UdvaHXWHaISWGSCqAT6M0IUuxkDe7EOzteHbIJi_UowyYykDvRtpQ0T_7HT8BeRMWhs</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>28350114</pqid></control><display><type>article</type><title>A low-power 170-MHz discrete-time analog FIR filter</title><source>IEEE Electronic Library (IEL)</source><creator>Xiaodong Wang ; Spencer, R.R.</creator><creatorcontrib>Xiaodong Wang ; Spencer, R.R.</creatorcontrib><description>A 170-MHz analog finite impulse response (FIR) filter operating from a single 3.3-V supply is described. The design has been fabricated in the HP 1.2-/spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using multiplying digital-to-analog converters (MDAC's) with 6-b resolution.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.661207</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit noise ; Circuit testing ; CMOS process ; Digital-analog conversion ; Equalizers ; Finite impulse response filter ; Magnetic memory ; Magnetic recording ; Polynomials ; Power dissipation</subject><ispartof>IEEE journal of solid-state circuits, 1998-03, Vol.33 (3), p.417-426</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c275t-3d320ff49defaa3c6b50297107fcbe4bdf84b0bf6c380325b08dde92ca002813</citedby><cites>FETCH-LOGICAL-c275t-3d320ff49defaa3c6b50297107fcbe4bdf84b0bf6c380325b08dde92ca002813</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/661207$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/661207$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Xiaodong Wang</creatorcontrib><creatorcontrib>Spencer, R.R.</creatorcontrib><title>A low-power 170-MHz discrete-time analog FIR filter</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A 170-MHz analog finite impulse response (FIR) filter operating from a single 3.3-V supply is described. The design has been fabricated in the HP 1.2-/spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using multiplying digital-to-analog converters (MDAC's) with 6-b resolution.</description><subject>Circuit noise</subject><subject>Circuit testing</subject><subject>CMOS process</subject><subject>Digital-analog conversion</subject><subject>Equalizers</subject><subject>Finite impulse response filter</subject><subject>Magnetic memory</subject><subject>Magnetic recording</subject><subject>Polynomials</subject><subject>Power dissipation</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1998</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo90MFLwzAUBvAgCtYpePbUk3jJfC9J2_Q4hnODiSA7eAtp-iKVbp1Jx9C_3kqHp8fj_fh4fIzdIkwRoXxU0zxHAcUZSzDLNMdCvp-zBAA1LwXAJbuK8XNYldKYMDlL2-7I992RQooF8JflT1o30QXqiffNllK7s233kS5Wb6lv2p7CNbvwto10c5oTtlk8beZLvn59Xs1na-5EkfVc1lKA96qsyVsrXV5lIMoCofCuIlXVXqsKKp87qUGKrAJd11QKZwGERjlh92PsPnRfB4q92Q5_UdvaHXWHaISWGSCqAT6M0IUuxkDe7EOzteHbIJi_UowyYykDvRtpQ0T_7HT8BeRMWhs</recordid><startdate>199803</startdate><enddate>199803</enddate><creator>Xiaodong Wang</creator><creator>Spencer, R.R.</creator><general>IEEE</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>199803</creationdate><title>A low-power 170-MHz discrete-time analog FIR filter</title><author>Xiaodong Wang ; Spencer, R.R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c275t-3d320ff49defaa3c6b50297107fcbe4bdf84b0bf6c380325b08dde92ca002813</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1998</creationdate><topic>Circuit noise</topic><topic>Circuit testing</topic><topic>CMOS process</topic><topic>Digital-analog conversion</topic><topic>Equalizers</topic><topic>Finite impulse response filter</topic><topic>Magnetic memory</topic><topic>Magnetic recording</topic><topic>Polynomials</topic><topic>Power dissipation</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Xiaodong Wang</creatorcontrib><creatorcontrib>Spencer, R.R.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Xiaodong Wang</au><au>Spencer, R.R.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A low-power 170-MHz discrete-time analog FIR filter</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1998-03</date><risdate>1998</risdate><volume>33</volume><issue>3</issue><spage>417</spage><epage>426</epage><pages>417-426</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A 170-MHz analog finite impulse response (FIR) filter operating from a single 3.3-V supply is described. The design has been fabricated in the HP 1.2-/spl mu/m CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using multiplying digital-to-analog converters (MDAC's) with 6-b resolution.</abstract><pub>IEEE</pub><doi>10.1109/4.661207</doi><tpages>10</tpages></addata></record>
fulltext fulltext_linktorsrc
identifier ISSN: 0018-9200
ispartof IEEE journal of solid-state circuits, 1998-03, Vol.33 (3), p.417-426
issn 0018-9200
1558-173X
language eng
recordid cdi_proquest_miscellaneous_28350114
source IEEE Electronic Library (IEL)
subjects Circuit noise
Circuit testing
CMOS process
Digital-analog conversion
Equalizers
Finite impulse response filter
Magnetic memory
Magnetic recording
Polynomials
Power dissipation
title A low-power 170-MHz discrete-time analog FIR filter
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T00%3A03%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20low-power%20170-MHz%20discrete-time%20analog%20FIR%20filter&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Xiaodong%20Wang&rft.date=1998-03&rft.volume=33&rft.issue=3&rft.spage=417&rft.epage=426&rft.pages=417-426&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/4.661207&rft_dat=%3Cproquest_RIE%3E28350114%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=28350114&rft_id=info:pmid/&rft_ieee_id=661207&rfr_iscdi=true