Design techniques for silicon compiler implementations of high-speed FIR digital filters

Architecture design techniques for implementing both single-rate and multirate high throughput finite impulse response (FIR) digital filters are explored, with an emphasis on those which are applicable to automated integrated circuit layout techniques. Various parallel architectures are examined bas...

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Veröffentlicht in:IEEE journal of solid-state circuits 1996-05, Vol.31 (5), p.656-667
Hauptverfasser: Hawley, R.A., Wong, B.C., Thu-Ji Lin, Laskowski, J., Samueli, H.
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Sprache:eng
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